217 lines
7.4 KiB
Verilog
217 lines
7.4 KiB
Verilog
// Shared AXI slave for the legacy FFT accelerator and the ML-KEM accelerator.
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//
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// Both software stacks use the same base address, 0xbf400000. Their internal
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// maps do not overlap:
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// ML-KEM: 0x0000..0x0114
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// FFT: 0x1000, 0x2000, 0x3000, 0x4000, 0xf000 windows
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// Route 0x0xxx to ML-KEM and all other offsets to FFT.
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module fft_mlkem_axi_slave (
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input clk,
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input resetn,
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input [4:0] s_axi_awid,
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input [31:0] s_axi_awaddr,
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input [7:0] s_axi_awlen,
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input [2:0] s_axi_awsize,
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input [1:0] s_axi_awburst,
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input s_axi_awlock,
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input [3:0] s_axi_awcache,
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input [2:0] s_axi_awprot,
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input s_axi_awvalid,
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output s_axi_awready,
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input [4:0] s_axi_wid,
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input [31:0] s_axi_wdata,
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input [3:0] s_axi_wstrb,
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input s_axi_wlast,
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input s_axi_wvalid,
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output s_axi_wready,
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output [4:0] s_axi_bid,
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output [1:0] s_axi_bresp,
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output s_axi_bvalid,
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input s_axi_bready,
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input [4:0] s_axi_arid,
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input [31:0] s_axi_araddr,
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input [7:0] s_axi_arlen,
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input [2:0] s_axi_arsize,
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input [1:0] s_axi_arburst,
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input s_axi_arlock,
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input [3:0] s_axi_arcache,
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input [2:0] s_axi_arprot,
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input s_axi_arvalid,
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output s_axi_arready,
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output [4:0] s_axi_rid,
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output [31:0] s_axi_rdata,
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output [1:0] s_axi_rresp,
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output s_axi_rlast,
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output s_axi_rvalid,
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input s_axi_rready,
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output fft_finish,
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output mlkem_intr
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);
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wire aw_to_mlkem = (s_axi_awaddr[15:12] == 4'h0);
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wire ar_to_mlkem = (s_axi_araddr[15:12] == 4'h0);
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reg write_sel_mlkem;
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reg write_active;
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reg read_sel_mlkem;
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reg read_active;
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wire mlkem_awready, mlkem_wready, mlkem_bvalid;
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wire [4:0] mlkem_bid;
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wire [1:0] mlkem_bresp;
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wire mlkem_arready, mlkem_rvalid, mlkem_rlast;
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wire [4:0] mlkem_rid;
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wire [31:0] mlkem_rdata;
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wire [1:0] mlkem_rresp;
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wire fft_awready, fft_wready, fft_bvalid;
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wire [4:0] fft_bid;
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wire [1:0] fft_bresp;
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wire fft_arready, fft_rvalid, fft_rlast;
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wire [4:0] fft_rid;
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wire [31:0] fft_rdata;
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wire [1:0] fft_rresp;
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wire sel_w_mlkem = write_active ? write_sel_mlkem : aw_to_mlkem;
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wire sel_r_mlkem = read_active ? read_sel_mlkem : ar_to_mlkem;
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assign s_axi_awready = !write_active && (aw_to_mlkem ? mlkem_awready : fft_awready);
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assign s_axi_wready = sel_w_mlkem ? mlkem_wready : fft_wready;
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assign s_axi_bvalid = sel_w_mlkem ? mlkem_bvalid : fft_bvalid;
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assign s_axi_bid = sel_w_mlkem ? mlkem_bid : fft_bid;
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assign s_axi_bresp = sel_w_mlkem ? mlkem_bresp : fft_bresp;
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assign s_axi_arready = !read_active && (ar_to_mlkem ? mlkem_arready : fft_arready);
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assign s_axi_rvalid = sel_r_mlkem ? mlkem_rvalid : fft_rvalid;
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assign s_axi_rlast = sel_r_mlkem ? mlkem_rlast : fft_rlast;
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assign s_axi_rid = sel_r_mlkem ? mlkem_rid : fft_rid;
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assign s_axi_rdata = sel_r_mlkem ? mlkem_rdata : fft_rdata;
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assign s_axi_rresp = sel_r_mlkem ? mlkem_rresp : fft_rresp;
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always @(posedge clk or negedge resetn) begin
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if (!resetn) begin
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write_active <= 1'b0;
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write_sel_mlkem <= 1'b0;
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read_active <= 1'b0;
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read_sel_mlkem <= 1'b0;
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end else begin
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if (!write_active && s_axi_awvalid && s_axi_awready) begin
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write_active <= 1'b1;
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write_sel_mlkem <= aw_to_mlkem;
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end else if (write_active && s_axi_bvalid && s_axi_bready) begin
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write_active <= 1'b0;
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end
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if (!read_active && s_axi_arvalid && s_axi_arready) begin
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read_active <= 1'b1;
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read_sel_mlkem <= ar_to_mlkem;
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end else if (read_active && s_axi_rvalid && s_axi_rready && s_axi_rlast) begin
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read_active <= 1'b0;
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end
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end
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end
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mlkem_axi_slave u_mlkem_axi_slave (
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.clk (clk),
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.resetn (resetn),
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.s_axi_awid (s_axi_awid),
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.s_axi_awaddr (s_axi_awaddr),
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.s_axi_awlen (s_axi_awlen),
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.s_axi_awsize (s_axi_awsize),
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.s_axi_awburst (s_axi_awburst),
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.s_axi_awlock (s_axi_awlock),
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.s_axi_awcache (s_axi_awcache),
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.s_axi_awprot (s_axi_awprot),
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.s_axi_awvalid (s_axi_awvalid && !write_active && aw_to_mlkem),
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.s_axi_awready (mlkem_awready),
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.s_axi_wid (s_axi_wid),
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.s_axi_wdata (s_axi_wdata),
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.s_axi_wstrb (s_axi_wstrb),
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.s_axi_wlast (s_axi_wlast),
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.s_axi_wvalid (s_axi_wvalid && sel_w_mlkem),
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.s_axi_wready (mlkem_wready),
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.s_axi_bid (mlkem_bid),
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.s_axi_bresp (mlkem_bresp),
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.s_axi_bvalid (mlkem_bvalid),
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.s_axi_bready (s_axi_bready && sel_w_mlkem),
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.s_axi_arid (s_axi_arid),
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.s_axi_araddr (s_axi_araddr),
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.s_axi_arlen (s_axi_arlen),
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.s_axi_arsize (s_axi_arsize),
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.s_axi_arburst (s_axi_arburst),
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.s_axi_arlock (s_axi_arlock),
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.s_axi_arcache (s_axi_arcache),
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.s_axi_arprot (s_axi_arprot),
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.s_axi_arvalid (s_axi_arvalid && !read_active && ar_to_mlkem),
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.s_axi_arready (mlkem_arready),
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.s_axi_rid (mlkem_rid),
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.s_axi_rdata (mlkem_rdata),
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.s_axi_rresp (mlkem_rresp),
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.s_axi_rlast (mlkem_rlast),
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.s_axi_rvalid (mlkem_rvalid),
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.s_axi_rready (s_axi_rready && sel_r_mlkem),
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.intr (mlkem_intr)
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);
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fft_controller u_fft_controller (
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.aclk (clk),
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.aresetn (resetn),
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.s_awid (s_axi_awid),
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.s_awaddr (s_axi_awaddr),
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.s_awlen (s_axi_awlen),
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.s_awsize (s_axi_awsize),
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.s_awburst (s_axi_awburst),
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.s_awlock (s_axi_awlock),
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.s_awcache (s_axi_awcache),
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.s_awprot (s_axi_awprot),
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.s_awvalid (s_axi_awvalid && !write_active && !aw_to_mlkem),
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.s_awready (fft_awready),
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.s_wid (s_axi_wid),
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.s_wdata (s_axi_wdata),
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.s_wstrb (s_axi_wstrb),
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.s_wlast (s_axi_wlast),
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.s_wvalid (s_axi_wvalid && !sel_w_mlkem),
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.s_wready (fft_wready),
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.s_bid (fft_bid),
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.s_bresp (fft_bresp),
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.s_bvalid (fft_bvalid),
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.s_bready (s_axi_bready && !sel_w_mlkem),
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.s_arid (s_axi_arid),
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.s_araddr (s_axi_araddr),
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.s_arlen (s_axi_arlen),
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.s_arsize (s_axi_arsize),
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.s_arburst (s_axi_arburst),
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.s_arlock (s_axi_arlock),
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.s_arcache (s_axi_arcache),
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.s_arprot (s_axi_arprot),
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.s_arvalid (s_axi_arvalid && !read_active && !ar_to_mlkem),
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.s_arready (fft_arready),
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.s_rid (fft_rid),
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.s_rdata (fft_rdata),
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.s_rresp (fft_rresp),
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.s_rlast (fft_rlast),
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.s_rvalid (fft_rvalid),
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.s_rready (s_axi_rready && !sel_r_mlkem),
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.fft_finish (fft_finish)
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);
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endmodule
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