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FallenSigh 54aa37adee Add debug output for C[0][0]/C[1][1]/C[2][3] of groups 0,1

2026-06-25 03:03:10 +08:00

..

software

Add debug output for C[0][0]/C[1][1]/C[2][3] of groups 0,1

2026-06-25 03:03:10 +08:00

axi_ram.mif

Clean production code: -O2, read CRC32 from ExtRAM, remove all debug

2026-06-24 23:42:35 +08:00

hello_world.bin

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

toolchains

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

user-sample.bin

Clean production code: -O2, read CRC32 from ExtRAM, remove all debug

2026-06-24 23:42:35 +08:00