This repository has been archived on 2026-08-21. You can view files and clone it. You cannot open issues or pull requests or push a commit.

FallenSigh 20611157c3 tools: add extract_cbor_uart.py — extract UART output from CBOR trace files ...

Parses CBOR hardware trace format, extracts UART serial output bytes,
and optionally parses MATMUL timing markers + pipeline diagnostics.

Usage:
  python3 tools/extract_cbor_uart.py <file.cbor>          # full UART output
  python3 tools/extract_cbor_uart.py <file.cbor> -s       # timing summary
  python3 tools/extract_cbor_uart.py <file.cbor> -o out   # save to file

2026-06-26 17:40:20 +08:00

..

extract_cbor_uart.py

tools: add extract_cbor_uart.py — extract UART output from CBOR trace files

2026-06-26 17:40:20 +08:00

generate_matmul_testdata.py

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00