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FallenSigh 34ce639f69 test(fft): update fft_dma example ...

Ultraworked with [Sisyphus](https://github.com/code-yeongyu/oh-my-openagent)

Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>

2026-07-05 23:25:51 +08:00

..

asm

remove all the LF

2026-07-05 18:23:23 +08:00

c_prg

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

coremark

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

dhrystone

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

dma

Use uncached ExtRAM access (0xBC400000) to bypass CPU data cache

2026-06-24 02:04:40 +08:00

fft

Add DMA-friendly MLKEM windows

2026-07-05 20:07:14 +08:00

fft_dma

test(fft): update fft_dma example

2026-07-05 23:25:51 +08:00

fireye

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

hello_world

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

int_test

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

lenet

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

matmul_test

Add direct CDMA matmul path

2026-07-04 19:15:34 +08:00

mlkem_test

mlkem_test: add mlkem-native

2026-07-05 21:26:39 +08:00

pinball_game

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

.gitignore

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

fft_test_data.h

Optimize FFT test input generation

2026-07-05 19:48:16 +08:00