This website requires JavaScript.
Explore
Help
Sign In
fallensigh
/
ciciec2026
Archived
Watch
0
Star
0
Fork
0
You've already forked ciciec2026
Code
Issues
Pull Requests
Actions
Packages
Projects
Releases
Wiki
Activity
This repository has been archived on
2026-08-21
. You can view files and clone it. You cannot open issues or pull requests or push a commit.
Files
2e5d793bbf6b711e0ae8e4c0e7557ea6fa5b4d11
ciciec2026
/
sdk
History
FallenSigh
9ecda4aa7a
Fix CRC32 table, remove debug output
2026-06-25 02:51:36 +08:00
..
software
Fix CRC32 table, remove debug output
2026-06-25 02:51:36 +08:00
axi_ram.mif
Clean production code: -O2, read CRC32 from ExtRAM, remove all debug
2026-06-24 23:42:35 +08:00
hello_world.bin
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
toolchains
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
user-sample.bin
Clean production code: -O2, read CRC32 from ExtRAM, remove all debug
2026-06-24 23:42:35 +08:00