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FallenSigh 95fe94063c fix: revert UART FIFO batching — caused FIFO overflow + syserr on board ...

uart_puts(13B) + uart_puthex(8B) = 21 bytes without polling → FIFO overflow.
Board UART IP asserts AXI error → CPU syserr exception.
Simulation UART model is lenient, so sim passed but board failed.

Back to per-byte polling (safe).

2026-06-26 23:53:15 +08:00

..

dma.c

perf: drop stdint.h + picolibc — zero libc dependency

2026-06-26 22:34:26 +08:00

dma.h

perf: drop stdint.h + picolibc — zero libc dependency

2026-06-26 22:34:26 +08:00

Makefile

perf: drop stdint.h + picolibc — zero libc dependency

2026-06-26 22:34:26 +08:00

user-sample.c

fix: revert UART FIFO batching — caused FIFO overflow + syserr on board

2026-06-26 23:53:15 +08:00