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ciciec2026
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This repository has been archived on
2026-08-21
. You can view files and clone it. You cannot open issues or pull requests or push a commit.
Files
292d3c7abff752970b87eda5506e7e2521079e14
ciciec2026
/
rtl
/
ip
/
APB_UART
/
URT
History
FallenSigh
fbc993b846
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
..
raminfr.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_defines.h
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_receiver.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_regs.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_rfifo.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_sync_flops.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_tfifo.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_top.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
uart_transmitter.v
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00