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ciciec2026/sdk/software/examples/asm/user-sample.c
2026-07-05 17:59:31 +08:00

158 lines
3.5 KiB
C

/**
* user-sample - CICIEC 2026 Stage 3 evaluation program
*
* The CDMA/matmul direct sequencer reads 5000 A/B groups from ExtRAM, writes
* the complete C result region, and accumulates the required IEEE CRC32 in
* hardware while the C words are streamed out of matmul.
*/
#include <dma.h>
#define UART_THR (*(volatile unsigned char *)0xbf000000)
#define UART_LSR (*(volatile unsigned char *)0xbf000005)
#define LSR_THRE 0x20
static inline void uart_tx(unsigned char c)
{
while ((UART_LSR & LSR_THRE) == 0) {
}
UART_THR = c;
}
static void uart_puts(const char *s)
{
while (*s) {
uart_tx((unsigned char)*s++);
}
}
static void uart_put_matmul_start_fifo(void)
{
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'S';
UART_THR = 'T';
UART_THR = 'A';
UART_THR = 'R';
UART_THR = 'T';
UART_THR = '\n';
}
static inline void uart_wait_tx_empty(void)
{
while ((UART_LSR & LSR_THRE) == 0) {
}
}
static inline unsigned char hex_digit(unsigned int val, int shift)
{
unsigned char nibble = (unsigned char)((val >> shift) & 0xf);
return (unsigned char)(nibble < 10 ? ('0' + nibble) : ('a' + nibble - 10));
}
static void uart_put_result_fifo(unsigned int crc)
{
uart_wait_tx_empty();
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'C';
UART_THR = 'R';
UART_THR = 'C';
UART_THR = '3';
UART_THR = '2';
UART_THR = '=';
UART_THR = hex_digit(crc, 28);
UART_THR = hex_digit(crc, 24);
UART_THR = hex_digit(crc, 20);
uart_wait_tx_empty();
UART_THR = hex_digit(crc, 16);
UART_THR = hex_digit(crc, 12);
UART_THR = hex_digit(crc, 8);
UART_THR = hex_digit(crc, 4);
UART_THR = hex_digit(crc, 0);
UART_THR = '\n';
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'D';
UART_THR = 'O';
UART_THR = 'N';
uart_wait_tx_empty();
UART_THR = 'E';
UART_THR = '\n';
}
#ifndef MATMUL_GROUP_NUM
#define MATMUL_GROUP_NUM 5000
#endif
#ifndef MATMUL_WRITEBACK_RESULTS
#define MATMUL_WRITEBACK_RESULTS 1
#endif
#if MATMUL_FAST_START == 0
unsigned long UART_BASE = 0xbf000000;
#endif
#define EXTRAM_BASE_PHYS 0x1c400000u
#define SRC_BASE_WORDS 0u
#define DST_BASE_WORDS (SRC_BASE_WORDS + MATMUL_GROUP_NUM * 32u)
#define EXTRAM_PHYS_AB(g) (EXTRAM_BASE_PHYS + (SRC_BASE_WORDS * 4u) + (unsigned int)(g) * 128u)
#define EXTRAM_PHYS_C(g) (EXTRAM_BASE_PHYS + (DST_BASE_WORDS * 4u) + (unsigned int)(g) * 192u)
#define MATMUL_BASE_UNCACHED 0xbf500000u
#define MATMUL_CRC (*(volatile unsigned int *)(MATMUL_BASE_UNCACHED + 0x010u))
int main(void)
{
unsigned int crc;
unsigned int seq_ctrl;
if (MATMUL_GROUP_NUM <= 0) {
return 0;
}
DMA_SEQ->STATUS = SEQ_DONE_BIT;
DMA_SEQ->SRC_BASE = EXTRAM_PHYS_AB(0);
DMA_SEQ->DST_BASE = EXTRAM_PHYS_C(0);
DMA_SEQ->GROUPS = MATMUL_GROUP_NUM;
DMA_SEQ->MAT_BASE = 0x1f500000u;
DMA_SEQ->SRC_STRIDE = 128u;
DMA_SEQ->DST_STRIDE = 192u;
seq_ctrl = SEQ_START_BIT;
#if MATMUL_WRITEBACK_RESULTS == 0
seq_ctrl |= SEQ_SKIP_STORE_BIT;
#endif
uart_put_matmul_start_fifo();
DMA_SEQ->CTRL = seq_ctrl;
while ((DMA_SEQ->STATUS & SEQ_DONE_BIT) == 0u) {
}
DMA_SEQ->STATUS = SEQ_DONE_BIT;
crc = MATMUL_CRC;
uart_put_result_fifo(crc);
return 0;
}