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ciciec2026
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This repository has been archived on
2026-08-21
. You can view files and clone it. You cannot open issues or pull requests or push a commit.
Files
19751b9d185adc473f61835b3dfe86c693e8ede0
ciciec2026
/
sdk
/
software
/
examples
History
FallenSigh
4eca83bd3d
Add MLKEM DMA comparison test
2026-07-05 20:23:58 +08:00
..
asm
remove all the LF
2026-07-05 18:23:23 +08:00
c_prg
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
coremark
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
dhrystone
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
dma
Use uncached ExtRAM access (0xBC400000) to bypass CPU data cache
2026-06-24 02:04:40 +08:00
fft
Add DMA-friendly MLKEM windows
2026-07-05 20:07:14 +08:00
fft_dma
Add DMA-friendly MLKEM windows
2026-07-05 20:07:14 +08:00
fireye
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
hello_world
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
int_test
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
lenet
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
matmul_test
Add direct CDMA matmul path
2026-07-04 19:15:34 +08:00
mlkem_test
Add MLKEM DMA comparison test
2026-07-05 20:23:58 +08:00
pinball_game
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
.gitignore
Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC
2026-06-23 01:22:45 +08:00
fft_test_data.h
Optimize FFT test input generation
2026-07-05 19:48:16 +08:00