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FallenSigh f3af271788 Optimize matmul CRC pipeline and expose DMA cycles

2026-07-14 18:21:45 +08:00

..

software

Optimize matmul CRC pipeline and expose DMA cycles

2026-07-14 18:21:45 +08:00

axi_ram.mif

Optimize asm matmul crc software path

2026-07-06 00:16:23 +08:00

fft_dma.bin

Remove all debug and printf

2026-06-25 15:44:18 +08:00

fft.bin

Remove all debug and printf

2026-06-25 15:44:18 +08:00

hello_world.bin

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

mlkem_test.bin

chore(sdk): update axi_ram.mif and mlkem_test.bin

2026-07-01 21:18:05 +08:00

toolchains

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

user-sample.bin

Optimize asm matmul crc software path

2026-07-06 00:16:23 +08:00