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FallenSigh 4857016b42 update reports & add mlkem cdc test result & update pll

2026-07-11 10:09:45 +08:00

..

constraints

update reports & add mlkem cdc test result & update pll

2026-07-11 10:09:45 +08:00

vivado_reports_nodsp

update reports & add mlkem cdc test result & update pll

2026-07-11 10:09:45 +08:00

vivado_reports_withdsp

add vivado reports

2026-07-08 03:48:37 +08:00

check_dsp.py

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

create_project.tcl

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

generate_bit.tcl

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

run_impl.tcl

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00

run-linter.py

Initial commit: Loongson FPGA SoC project for 2026 CIC-IEC

2026-06-23 01:22:45 +08:00