# Force a clean implementation and generate the bitstream used by board tests.

set script_dir [file dirname [file normalize [info script]]]
set repo_root [file normalize [file join $script_dir ../../../..]]
set xpr [file join $repo_root fpga project Loongson_Soc.xpr]
set dsp_report [file join $repo_root fpga project dsp_utilization.rpt]

if {![file exists $xpr]} {
    puts stderr "ERROR: project not found: $xpr"
    exit 2
}

open_project $xpr
reset_run synth_1
launch_runs synth_1
wait_on_run synth_1

set synth_run [get_runs synth_1]
set synth_progress [get_property PROGRESS $synth_run]
set synth_status [get_property STATUS $synth_run]
puts "synth_1 progress: $synth_progress"
puts "synth_1 status: $synth_status"
if {$synth_progress ne "100%" || [string first "ERROR" [string toupper $synth_status]] >= 0} {
    puts stderr "ERROR: fresh synthesis failed"
    close_project
    exit 3
}

launch_runs impl_1 -to_step write_bitstream
wait_on_run impl_1

set run [get_runs impl_1]
set progress [get_property PROGRESS $run]
set status [get_property STATUS $run]
puts "impl_1 progress: $progress"
puts "impl_1 status: $status"
if {$progress ne "100%" || [string first "ERROR" [string toupper $status]] >= 0} {
    puts stderr "ERROR: fresh implementation failed"
    close_project
    exit 4
}

open_run impl_1
report_utilization -file $dsp_report
close_project
exit 0