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Add matmul AXI master path

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This commit is contained in:
FallenSigh
2026-07-01 23:13:28 +08:00
parent 2b6e29f761
commit fd03aaaaa1
4 changed files with 2198 additions and 1748 deletions
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108
sdk/axi_ram.mif
View File

@@ -52,7 +52,7 @@
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@@ -94,7 +94,7 @@
00000000000101010000000000001110
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00011100000000000000000000001100
00000010100011000001000110001100
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00000100000000000011000000101100
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00000100000000010001000000101101
@@ -146,67 +146,70 @@
00010101011111100000000000010000
00101001100000000111000001100001
00101001100000000110000001110111
00101001100000000101000001111000
00000010100000010011010000001100
00011100000000000001000000001111
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01010100000001100011100000000000
00010101011111100110000000001100
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00010100001110001000000000001101
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00000000000101010000000010010111
00000000000101010000000110001101
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@@ -222,6 +225,7 @@
00000010100000000010010000010100
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00000011100000000001011000001101
00000011010000000000000000000000
00000000000101111011101000101100
00000011010000000011110110001100
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@@ -236,7 +240,7 @@
00010101011111100000000000010000
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00011100000000000001000000001111
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00000011100000000001011000001101
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@@ -248,11 +252,11 @@
00101001000000000000001000001110
00101000000000000000000111101100
01011111111111111101110110000000
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01010100000000101100100000000000
00010101011111100000000000010000
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@@ -265,11 +269,11 @@
00101000000000000000000111101100
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01010100000000101000010000000000
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@@ -282,10 +286,22 @@
01011111111111111110000110000000
00101000100000000111000001100001
00101000100000000110000001110111
00101000100000000101000001111000
00000000000101010000000000000100
00000010100000001000000001100011
01001100000000000000000000100000
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00000000000000000000000000000000
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00101001100000011110000001100001
00101001100000011101000001100010

42
sdk/software/examples/asm/user-sample.c
View File

@@ -1,13 +1,7 @@
/**
* user-sample - CIC-IEC 2026 Stage 3 Evaluation Program
*
* (ULTIMATE PERFORMANCE DMA + PING-PONG BUFFER ARCHITECTURE v2)
*
* Optimizations over v1:
* 1. Pre-fire DMA Ch0 load at loop tail → fully overlaps with IP compute
* 2. Inlined wait loops → zero function-call overhead in hot path
* 3. Inlined DMA start → skips redundant STATUS_BUSY_BIT check
* 4. XOR bank toggle → avoids g%2 recomputation per iteration
* Matmul AXI-master path.
*/
#include <dma.h>
@@ -82,12 +76,19 @@ unsigned long CORE_CLOCKS_PER_SEC = 33000000L;
#define MATMUL_CTRL (MATMUL_BASE_UNCACHED + 0x000)
#define MATMUL_STATUS (MATMUL_BASE_UNCACHED + 0x004)
#define MATMUL_BASE_PHYS_FOR_DMA MATMUL_BASE_PHYS
#define MATMUL_DMA_SRC_BASE (MATMUL_BASE_UNCACHED + 0x020)
#define MATMUL_DMA_DST_BASE (MATMUL_BASE_UNCACHED + 0x024)
#define MATMUL_DMA_GROUPS (MATMUL_BASE_UNCACHED + 0x028)
#define MATMUL_DMA_SRC_STRIDE (MATMUL_BASE_UNCACHED + 0x02C)
#define MATMUL_DMA_DST_STRIDE (MATMUL_BASE_UNCACHED + 0x030)
#define CTRL_START_B0 0x1
#define CTRL_START_B1 0x2
#define CTRL_DMA_START (1 << 8)
#define STATUS_DONE 0x2
#define STATUS_ERROR 0x4
#define STATUS_DMA_BUSY (1 << 3)
#define STATUS_DMA_DONE (1 << 4)
#define MATMUL_CRC (MATMUL_BASE_UNCACHED + 0x010)
@@ -101,8 +102,9 @@ int main(void)
if (MATMUL_GROUP_NUM <= 0) return 0;
/* ── Hot-path local volatile pointers (one-time addr calc) ──────── */
volatile unsigned int *mat_crc = (volatile unsigned int *)MATMUL_CRC;
volatile dma_seq_regs_t *seq = DMA_SEQ;
volatile unsigned int *mat_ctrl = (volatile unsigned int *)MATMUL_CTRL;
volatile unsigned int *mat_status = (volatile unsigned int *)MATMUL_STATUS;
volatile unsigned int *mat_crc = (volatile unsigned int *)MATMUL_CRC;
unsigned int crc;
unsigned int cycle_start, cycle_end, cycles, time_us;
@@ -111,16 +113,16 @@ int main(void)
uart_puts("MATMUL_START\r\n");
cycle_start = get_clock_count();
seq->STATUS = SEQ_DONE_BIT;
seq->SRC_BASE = EXTRAM_PHYS_AB(0);
seq->DST_BASE = EXTRAM_PHYS_C(0);
seq->GROUPS = MATMUL_GROUP_NUM;
seq->MAT_BASE = MATMUL_BASE_PHYS_FOR_DMA;
seq->SRC_STRIDE = 128;
seq->DST_STRIDE = 192;
seq->CTRL = SEQ_START_BIT;
while (!(seq->STATUS & SEQ_DONE_BIT)) {}
seq->STATUS = SEQ_DONE_BIT;
*(volatile unsigned int *)MATMUL_CRC = 0;
*mat_status = STATUS_DMA_DONE | STATUS_DONE | STATUS_ERROR;
*(volatile unsigned int *)MATMUL_DMA_SRC_BASE = EXTRAM_PHYS_AB(0);
*(volatile unsigned int *)MATMUL_DMA_DST_BASE = EXTRAM_PHYS_C(0);
*(volatile unsigned int *)MATMUL_DMA_GROUPS = MATMUL_GROUP_NUM;
*(volatile unsigned int *)MATMUL_DMA_SRC_STRIDE = 128;
*(volatile unsigned int *)MATMUL_DMA_DST_STRIDE = 192;
*mat_ctrl = CTRL_DMA_START;
while (!(*mat_status & STATUS_DMA_DONE)) {}
*mat_status = STATUS_DMA_DONE;
cycle_end = get_clock_count();
cycles = cycle_end - cycle_start;
time_us = cycles / (CORE_CLOCKS_PER_SEC / 1000000UL);