From f55e15af3212f7f980a290b7fb2f3d7cd74a74d0 Mon Sep 17 00:00:00 2001 From: FallenSigh Date: Fri, 26 Jun 2026 17:49:39 +0800 Subject: [PATCH] perf(matmul): remove all DMA TAG writes (hardware ignores TAG register) Each uncached TAG write costs ~810ns on the AXI bus. Removed: - 2 TAG writes per main loop iteration (Ch1 store + Ch0 pre-fire) - 2 TAG writes in prologue (group 0 load + pre-fire group 1) - 1 TAG write in epilogue (final store) Total: ~10,000 wasted AXI transactions eliminated for 5000 groups. Estimated ~8% reduction in per-iteration time. --- sdk/software/examples/asm/user-sample.c | 5 ----- 1 file changed, 5 deletions(-) diff --git a/sdk/software/examples/asm/user-sample.c b/sdk/software/examples/asm/user-sample.c index 7f98fd8..b9096e8 100644 --- a/sdk/software/examples/asm/user-sample.c +++ b/sdk/software/examples/asm/user-sample.c @@ -94,7 +94,6 @@ int main(void) ch0->SRC_ADDR = EXTRAM_PHYS_AB(0); ch0->DST_ADDR = phys_bank_AB[0]; ch0->LENGTH = 128; - ch0->TAG = 10; ch0->CTRL = DMA_CTRL_VAL; while (!(ch0->STATUS & STATUS_DONE_BIT)) {} ch0->STATUS = STATUS_DONE_BIT; @@ -107,7 +106,6 @@ int main(void) ch0->SRC_ADDR = EXTRAM_PHYS_AB(1); ch0->DST_ADDR = phys_bank_AB[1]; ch0->LENGTH = 128; - ch0->TAG = 10; ch0->CTRL = DMA_CTRL_VAL; } @@ -143,7 +141,6 @@ int main(void) ch1->SRC_ADDR = phys_bank_C[prev_bank]; ch1->DST_ADDR = EXTRAM_PHYS_C(g - 1); ch1->LENGTH = 192; - ch1->TAG = 20; ch1->CTRL = DMA_CTRL_VAL; // 4. Wait for current DMA Ch0 load (group g → cur_bank, pre-fired in iteration g-1) @@ -160,7 +157,6 @@ int main(void) ch0->SRC_ADDR = EXTRAM_PHYS_AB(g + 1); ch0->DST_ADDR = phys_bank_AB[next_bank]; ch0->LENGTH = 128; - ch0->TAG = 10; ch0->CTRL = DMA_CTRL_VAL; } @@ -183,7 +179,6 @@ int main(void) ch1->SRC_ADDR = phys_bank_C[(MATMUL_GROUP_NUM - 1) % 2]; ch1->DST_ADDR = EXTRAM_PHYS_C(MATMUL_GROUP_NUM - 1); ch1->LENGTH = 192; - ch1->TAG = 20; ch1->CTRL = DMA_CTRL_VAL; while (!(ch1->STATUS & STATUS_DONE_BIT)) {} ch1->STATUS = STATUS_DONE_BIT;