From dde6a46b492168fb3fbff76c344445f6be4e5d78 Mon Sep 17 00:00:00 2001
From: FallenSigh <fallensigh@gmail.com>
Date: Wed, 1 Jul 2026 21:17:55 +0800
Subject: [PATCH] fix(asm): add uart_putdec and confreg_time.h to user-sample

Ultraworked with [Sisyphus](https://github.com/code-yeongyu/oh-my-openagent)

Co-authored-by: Sisyphus <clio-agent@sisyphuslabs.ai>
---
 sdk/software/examples/asm/user-sample.c | 28 +++++++++++++++++++++++++
 1 file changed, 28 insertions(+)

diff --git a/sdk/software/examples/asm/user-sample.c b/sdk/software/examples/asm/user-sample.c
index 76a5ce8..d31a9a0 100644
--- a/sdk/software/examples/asm/user-sample.c
+++ b/sdk/software/examples/asm/user-sample.c
@@ -11,6 +11,7 @@
  */
 
 #include <dma.h>
+#include <confreg_time.h>
 
 /* ─── UART 16550 direct access (bypasses slow printf/picolibc) ──────── */
 #define UART_THR (*(volatile unsigned char *)0xbf000000)
@@ -34,6 +35,24 @@ static void uart_puthex(unsigned int val) {
     }
 }
 
+static void uart_putdec(unsigned int val) {
+    char buf[10];
+    int i = 0;
+
+    if (val == 0) {
+        uart_tx('0');
+        return;
+    }
+
+    while (val != 0) {
+        buf[i++] = (char)('0' + (val % 10));
+        val /= 10;
+    }
+    while (i > 0) {
+        uart_tx((unsigned char)buf[--i]);
+    }
+}
+
 /* ─── Configurable group count (default 5000) ──────────────────────── */
 #ifndef MATMUL_GROUP_NUM
 #define MATMUL_GROUP_NUM 5000
@@ -88,12 +107,14 @@ int main(void)
     volatile dma_ch_regs_t *ch1   = DMA_CH(1);
 
     unsigned int crc;
+    unsigned int cycle_start, cycle_end, cycles, time_us;
     int g, bank;
 
     unsigned int ctrl_start[2]   = {CTRL_START_B0, CTRL_START_B1};
 
     /* ── Start marker (must be first output) ──────────────────── */
     uart_puts("MATMUL_START\r\n");
+    cycle_start = get_clock_count();
 
     // Reset IP state
     *mat_status = STATUS_DONE | STATUS_ERROR;
@@ -205,12 +226,19 @@ int main(void)
     ch1->CTRL     = DMA_CTRL_VAL;
     while (!(ch1->STATUS & STATUS_DONE_BIT)) {}
     ch1->STATUS = STATUS_DONE_BIT;
+    cycle_end = get_clock_count();
+    cycles = cycle_end - cycle_start;
+    time_us = cycles / (CORE_CLOCKS_PER_SEC / 1000000UL);
 
     /* ── Read hardware CRC32 ──────────────────────────────────── */
     crc = *mat_crc;
 
     uart_puts("MATMUL_CRC32=");
     uart_puthex(crc);
+    uart_puts("\r\nMATMUL_CYCLES=");
+    uart_putdec(cycles);
+    uart_puts("\r\nMATMUL_TIME_US=");
+    uart_putdec(time_us);
     uart_puts("\r\nMATMUL_DONE\r\n");
 
     return 0;