test: add board FFT validation and VCD capture

doc/reports/system/tools/run_soc_sim.tcl

@@ -5,6 +5,17 @@ set script_dir [file dirname [file normalize [info script]]]
 set repo_root [file normalize [file join $script_dir ../../../..]]
 set xpr [file join $repo_root fpga project Loongson_Soc.xpr]
 
+set save_vcd 0
+if {[info exists ::env(SAVE_VCD)]} {
+    set value [string tolower [string trim $::env(SAVE_VCD)]]
+    set save_vcd [expr {$value ni {"" "0" "false" "no" "off"}}]
+}
+
+set sim_run_time "all"
+if {[info exists ::env(SIM_RUN_TIME)] && $::env(SIM_RUN_TIME) ne ""} {
+    set sim_run_time $::env(SIM_RUN_TIME)
+}
+
 # xelab inherits this when compiling generated C files with the host gcc.
 set ::env(CCACHE_DISABLE) 1
 
@@ -31,11 +42,58 @@ set simset [get_filesets sim_1]
 set_property top tb_top $simset
 set_property incremental false $simset
 set_property xsim.elaborate.mt_level off $simset
-set_property xsim.elaborate.debug_level off $simset
+set_property xsim.elaborate.debug_level [expr {$save_vcd ? "typical" : "off"}] $simset
 set_property xsim.simulate.log_all_signals false $simset
+if {$save_vcd} {
+    # launch_simulation normally runs 1000 ns before returning. Start at 0 ns
+    # so the VCD includes power-on reset and reset release.
+    set_property xsim.simulate.runtime 0ns $simset
+}
 update_compile_order -fileset sim_1
 launch_simulation
-run all
+
+if {$save_vcd} {
+    if {![info exists ::env(SOC_VCD_PATH)] || $::env(SOC_VCD_PATH) eq ""} {
+        puts stderr "ERROR: SAVE_VCD requires SOC_VCD_PATH"
+        close_sim
+        close_project
+        exit 4
+    }
+
+    set vcd_path [file normalize $::env(SOC_VCD_PATH)]
+    set vcd_patterns [list \
+        /tb_top/clk \
+        /tb_top/reset \
+        /tb_top/UART_TX \
+        /tb_top/uart_wen \
+        /tb_top/uart_data \
+        /tb_top/debug_wb_pc]
+    if {[info exists ::env(VCD_SCOPE)] && $::env(VCD_SCOPE) ne ""} {
+        set vcd_patterns [list $::env(VCD_SCOPE)]
+        set vcd_objects [get_objects -quiet -r {*}$vcd_patterns]
+    } else {
+        # Keep the default trace small. Recursive collection is only enabled
+        # when the caller explicitly supplies VCD_SCOPE.
+        set vcd_objects [get_objects -quiet {*}$vcd_patterns]
+    }
+    if {[llength $vcd_objects] == 0} {
+        puts stderr "ERROR: VCD scope matched no simulation objects: $vcd_patterns"
+        close_sim
+        close_project
+        exit 5
+    }
+
+    file mkdir [file dirname $vcd_path]
+    puts "Recording VCD: $vcd_path (scope: $vcd_patterns)"
+    open_vcd $vcd_path
+    log_vcd $vcd_objects
+}
+
+puts "Running simulation for: $sim_run_time"
+run $sim_run_time
+if {$save_vcd} {
+    close_vcd
+}
 close_sim
 close_project
 exit 0