test: add board FFT validation and VCD capture

This commit is contained in:
2026-07-15 04:13:15 +08:00
parent 2359e7976c
commit d45646342b
10 changed files with 198 additions and 23 deletions

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@@ -5,8 +5,9 @@ Generated logs and Vivado reports used by `system_design_report.tex` live here:
- `soc/`: UART output from SoC simulations
- `build/`: software build logs for the five selected examples
- `vivado/`: timing, utilization, CDC, DRC, route and power reports
- `board/`: official board evaluation output
- `board/`: official matmul evaluation plus FFT/FFT-DMA board UART logs
Run `../tools/run_report_tests.sh refresh` after replacing evidence. Large generated
artifacts such as `.wdb`, `.jou`, `.str`, implementation checkpoints and bitstreams do
not belong in this directory.
artifacts such as `.vcd`, `.wdb`, `.jou`, `.str`, implementation checkpoints and
bitstreams do not belong in Git. SoC VCD files may be generated here temporarily with
`SAVE_VCD=1`; archive them separately when they are needed as report evidence.