test: add board FFT validation and VCD capture
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@@ -5,8 +5,9 @@ Generated logs and Vivado reports used by `system_design_report.tex` live here:
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- `soc/`: UART output from SoC simulations
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- `build/`: software build logs for the five selected examples
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- `vivado/`: timing, utilization, CDC, DRC, route and power reports
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- `board/`: official board evaluation output
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- `board/`: official matmul evaluation plus FFT/FFT-DMA board UART logs
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Run `../tools/run_report_tests.sh refresh` after replacing evidence. Large generated
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artifacts such as `.wdb`, `.jou`, `.str`, implementation checkpoints and bitstreams do
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not belong in this directory.
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artifacts such as `.vcd`, `.wdb`, `.jou`, `.str`, implementation checkpoints and
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bitstreams do not belong in Git. SoC VCD files may be generated here temporarily with
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`SAVE_VCD=1`; archive them separately when they are needed as report evidence.
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