Add standalone CDMA matmul bridge
This commit is contained in:
235
rtl/soc_top.v
235
rtl/soc_top.v
@@ -393,12 +393,15 @@ wire dma_s_wlast ;
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wire dma_s_wvalid ;
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wire dma_s_wready ;
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wire [4 :0] dma_s_bid ;
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wire [1 :0] dma_s_bresp ;
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wire dma_s_bvalid ;
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wire dma_s_bready ;
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wire dma_finish ;
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// reserved
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wire [1 :0] dma_s_bresp ;
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wire dma_s_bvalid ;
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wire dma_s_bready ;
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wire dma_finish ;
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wire cdma_dma_finish;
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wire cdma_matmul_seq_irq;
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assign dma_finish = cdma_dma_finish | cdma_matmul_seq_irq;
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// reserved
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wire [4 :0] axiOut_1_arid ;
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wire [31:0] axiOut_1_araddr ;
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wire [7 :0] axiOut_1_arlen ;
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@@ -1576,11 +1579,115 @@ wire [2:0] cdma_s_arprot;
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wire cdma_s_arvalid;
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wire cdma_s_arready;
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wire [31:0] cdma_s_rdata;
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wire [1:0] cdma_s_rresp;
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wire cdma_s_rvalid;
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wire cdma_s_rready;
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axi_axil_adapter #(
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wire [1:0] cdma_s_rresp;
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wire cdma_s_rvalid;
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wire cdma_s_rready;
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wire [31:0] cdma_mux_awaddr;
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wire cdma_mux_awvalid;
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wire cdma_mux_awready;
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wire [31:0] cdma_mux_wdata;
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wire [3:0] cdma_mux_wstrb;
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wire cdma_mux_wvalid;
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wire cdma_mux_wready;
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wire [1:0] cdma_mux_bresp;
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wire cdma_mux_bvalid;
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wire cdma_mux_bready;
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wire [31:0] cdma_mux_araddr;
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wire cdma_mux_arvalid;
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wire cdma_mux_arready;
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wire [31:0] cdma_mux_rdata;
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wire [1:0] cdma_mux_rresp;
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wire cdma_mux_rvalid;
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wire cdma_mux_rready;
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wire [31:0] cdma_bridge_awaddr;
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wire cdma_bridge_awvalid;
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wire cdma_bridge_awready;
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wire [31:0] cdma_bridge_wdata;
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wire [3:0] cdma_bridge_wstrb;
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wire cdma_bridge_wvalid;
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wire cdma_bridge_wready;
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wire [1:0] cdma_bridge_bresp;
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wire cdma_bridge_bvalid;
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wire cdma_bridge_bready;
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wire [31:0] cdma_bridge_araddr;
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wire cdma_bridge_arvalid;
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wire cdma_bridge_arready;
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wire [31:0] cdma_bridge_rdata;
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wire [1:0] cdma_bridge_rresp;
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wire cdma_bridge_rvalid;
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wire cdma_bridge_rready;
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wire bridge_cdma_req_valid;
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wire bridge_cdma_req_ready;
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wire [1:0] bridge_cdma_req_mode;
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wire [31:0] bridge_cdma_req_src;
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wire [31:0] bridge_cdma_req_dst;
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wire [31:0] bridge_cdma_req_bytes;
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wire [3:0] bridge_cdma_req_ep_id;
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wire [3:0] bridge_cdma_req_ep_bank;
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wire [7:0] bridge_cdma_req_ep_word_off;
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wire bridge_cdma_req_done;
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wire cdma_axil_wr_bridge = (cdma_s_awaddr[11:8] == 4'h2);
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wire cdma_axil_rd_bridge = (cdma_s_araddr[11:8] == 4'h2);
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reg cdma_axil_wr_active;
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reg cdma_axil_wr_bridge_hold;
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reg cdma_axil_b_bridge;
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reg cdma_axil_r_bridge;
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wire cdma_axil_wr_sel = cdma_axil_wr_active ? cdma_axil_wr_bridge_hold : cdma_axil_wr_bridge;
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assign cdma_mux_awaddr = cdma_s_awaddr;
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assign cdma_mux_awvalid = cdma_s_awvalid && !cdma_axil_wr_sel;
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assign cdma_mux_wdata = cdma_s_wdata;
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assign cdma_mux_wstrb = cdma_s_wstrb;
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assign cdma_mux_wvalid = cdma_s_wvalid && !cdma_axil_wr_sel;
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assign cdma_mux_bready = cdma_s_bready && !cdma_axil_b_bridge;
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assign cdma_mux_araddr = cdma_s_araddr;
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assign cdma_mux_arvalid = cdma_s_arvalid && !cdma_axil_rd_bridge;
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assign cdma_mux_rready = cdma_s_rready && !cdma_axil_r_bridge;
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assign cdma_bridge_awaddr = cdma_s_awaddr;
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assign cdma_bridge_awvalid = cdma_s_awvalid && cdma_axil_wr_sel;
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assign cdma_bridge_wdata = cdma_s_wdata;
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assign cdma_bridge_wstrb = cdma_s_wstrb;
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assign cdma_bridge_wvalid = cdma_s_wvalid && cdma_axil_wr_sel;
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assign cdma_bridge_bready = cdma_s_bready && cdma_axil_b_bridge;
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assign cdma_bridge_araddr = cdma_s_araddr;
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assign cdma_bridge_arvalid = cdma_s_arvalid && cdma_axil_rd_bridge;
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assign cdma_bridge_rready = cdma_s_rready && cdma_axil_r_bridge;
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assign cdma_s_awready = cdma_axil_wr_sel ? cdma_bridge_awready : cdma_mux_awready;
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assign cdma_s_wready = cdma_axil_wr_sel ? cdma_bridge_wready : cdma_mux_wready;
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assign cdma_s_bresp = cdma_axil_b_bridge ? cdma_bridge_bresp : cdma_mux_bresp;
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assign cdma_s_bvalid = cdma_axil_b_bridge ? cdma_bridge_bvalid : cdma_mux_bvalid;
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assign cdma_s_arready = cdma_axil_rd_bridge ? cdma_bridge_arready : cdma_mux_arready;
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assign cdma_s_rdata = cdma_axil_r_bridge ? cdma_bridge_rdata : cdma_mux_rdata;
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assign cdma_s_rresp = cdma_axil_r_bridge ? cdma_bridge_rresp : cdma_mux_rresp;
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assign cdma_s_rvalid = cdma_axil_r_bridge ? cdma_bridge_rvalid : cdma_mux_rvalid;
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always @(posedge sys_clk) begin
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if (!sys_resetn) begin
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cdma_axil_wr_active <= 1'b0;
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cdma_axil_wr_bridge_hold <= 1'b0;
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cdma_axil_b_bridge <= 1'b0;
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cdma_axil_r_bridge <= 1'b0;
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end else begin
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if (cdma_s_awvalid && !cdma_axil_wr_active) begin
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cdma_axil_wr_active <= 1'b1;
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cdma_axil_wr_bridge_hold <= cdma_axil_wr_bridge;
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end
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if (cdma_s_awvalid && cdma_s_awready && cdma_s_wvalid && cdma_s_wready) begin
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cdma_axil_b_bridge <= cdma_axil_wr_sel;
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cdma_axil_wr_active <= 1'b0;
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end
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if (cdma_s_arvalid && cdma_s_arready)
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cdma_axil_r_bridge <= cdma_axil_rd_bridge;
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end
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end
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axi_axil_adapter #(
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.ADDR_WIDTH(32),
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.AXI_DATA_WIDTH(32),
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.AXI_ID_WIDTH(5),
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@@ -1645,11 +1752,56 @@ u_axi_axil_adapter(
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.m_axil_rdata(cdma_s_rdata),
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.m_axil_rresp(cdma_s_rresp),
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.m_axil_rvalid(cdma_s_rvalid),
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.m_axil_rready(cdma_s_rready)
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);
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// 8 通道 DMA
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snix_axil_cdma_mux #(
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.m_axil_rready(cdma_s_rready)
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);
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cdma_matmul_bridge #(
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.ADDR_WIDTH (32),
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.AXIL_ADDR_WIDTH (32),
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.AXIL_DATA_WIDTH (32)
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) u_cdma_matmul_bridge (
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.clk (sys_clk),
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.rst_n (sys_resetn),
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.s_axil_awaddr (cdma_bridge_awaddr),
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.s_axil_awvalid (cdma_bridge_awvalid),
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.s_axil_awready (cdma_bridge_awready),
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.s_axil_wdata (cdma_bridge_wdata),
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.s_axil_wstrb (cdma_bridge_wstrb),
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.s_axil_wvalid (cdma_bridge_wvalid),
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.s_axil_wready (cdma_bridge_wready),
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.s_axil_bresp (cdma_bridge_bresp),
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.s_axil_bvalid (cdma_bridge_bvalid),
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.s_axil_bready (cdma_bridge_bready),
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.s_axil_araddr (cdma_bridge_araddr),
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.s_axil_arvalid (cdma_bridge_arvalid),
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.s_axil_arready (cdma_bridge_arready),
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.s_axil_rdata (cdma_bridge_rdata),
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.s_axil_rresp (cdma_bridge_rresp),
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.s_axil_rvalid (cdma_bridge_rvalid),
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.s_axil_rready (cdma_bridge_rready),
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.cdma_req_valid (bridge_cdma_req_valid),
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.cdma_req_ready (bridge_cdma_req_ready),
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.cdma_req_mode (bridge_cdma_req_mode),
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.cdma_req_src (bridge_cdma_req_src),
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.cdma_req_dst (bridge_cdma_req_dst),
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.cdma_req_bytes (bridge_cdma_req_bytes),
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.cdma_req_ep_id (bridge_cdma_req_ep_id),
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.cdma_req_ep_bank (bridge_cdma_req_ep_bank),
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.cdma_req_ep_word_off(bridge_cdma_req_ep_word_off),
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.cdma_req_done (bridge_cdma_req_done),
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.mat_start_valid (matmul_direct_start_valid),
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.mat_start_bank (matmul_direct_start_bank),
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.mat_done_clear (matmul_direct_done_clear),
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.mat_crc_clear (matmul_direct_crc_clear),
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.mat_done (matmul_direct_done),
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.seq_done_irq (cdma_matmul_seq_irq)
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);
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// 8 通道 DMA
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snix_axil_cdma_mux #(
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.ADDR_WIDTH (32),
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.DATA_WIDTH (32), // 适配你的 32-bit 总线
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.AXIL_ADDR_WIDTH (32),
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@@ -1663,23 +1815,23 @@ snix_axil_cdma_mux #(
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.rst_n (sys_resetn), // 低电平复位
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// AXI-Lite 从机接口 (接 CPU 发来的配置请求)
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.s_axil_awaddr (cdma_s_awaddr),
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.s_axil_awvalid (cdma_s_awvalid),
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.s_axil_awready (cdma_s_awready),
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.s_axil_wdata (cdma_s_wdata),
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.s_axil_wstrb (cdma_s_wstrb),
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.s_axil_wvalid (cdma_s_wvalid),
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.s_axil_wready (cdma_s_wready),
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.s_axil_bresp (cdma_s_bresp),
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.s_axil_bvalid (cdma_s_bvalid),
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.s_axil_bready (cdma_s_bready),
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.s_axil_araddr (cdma_s_araddr),
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.s_axil_arvalid (cdma_s_arvalid),
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.s_axil_arready (cdma_s_arready),
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.s_axil_rdata (cdma_s_rdata),
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.s_axil_rresp (cdma_s_rresp),
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.s_axil_rvalid (cdma_s_rvalid),
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.s_axil_rready (cdma_s_rready),
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.s_axil_awaddr (cdma_mux_awaddr),
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.s_axil_awvalid (cdma_mux_awvalid),
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.s_axil_awready (cdma_mux_awready),
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.s_axil_wdata (cdma_mux_wdata),
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.s_axil_wstrb (cdma_mux_wstrb),
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.s_axil_wvalid (cdma_mux_wvalid),
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.s_axil_wready (cdma_mux_wready),
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.s_axil_bresp (cdma_mux_bresp),
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.s_axil_bvalid (cdma_mux_bvalid),
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.s_axil_bready (cdma_mux_bready),
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.s_axil_araddr (cdma_mux_araddr),
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.s_axil_arvalid (cdma_mux_arvalid),
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.s_axil_arready (cdma_mux_arready),
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.s_axil_rdata (cdma_mux_rdata),
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.s_axil_rresp (cdma_mux_rresp),
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.s_axil_rvalid (cdma_mux_rvalid),
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.s_axil_rready (cdma_mux_rready),
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// AXI4 主机接口 (接 Crossbar 去搬运数据)
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.mm2mm_awid (dma_m_awid),
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@@ -1739,14 +1891,19 @@ snix_axil_cdma_mux #(
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.ep_rd_data (matmul_ep_rd_data),
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.ep_rd_ready (matmul_ep_rd_ready),
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.mat_start_valid (matmul_direct_start_valid),
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.mat_start_bank (matmul_direct_start_bank),
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.mat_done_clear (matmul_direct_done_clear),
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.mat_crc_clear (matmul_direct_crc_clear),
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.mat_done (matmul_direct_done),
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.ext_req_valid (bridge_cdma_req_valid),
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.ext_req_ready (bridge_cdma_req_ready),
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.ext_req_mode (bridge_cdma_req_mode),
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.ext_req_src (bridge_cdma_req_src),
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.ext_req_dst (bridge_cdma_req_dst),
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.ext_req_bytes (bridge_cdma_req_bytes),
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.ext_req_ep_id (bridge_cdma_req_ep_id),
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.ext_req_ep_bank (bridge_cdma_req_ep_bank),
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.ext_req_ep_word_off(bridge_cdma_req_ep_word_off),
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.ext_req_done (bridge_cdma_req_done),
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// 全局中断输出
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.dma_finish (dma_finish)
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.dma_finish (cdma_dma_finish)
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);
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endmodule
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