Add standalone CDMA matmul bridge

This commit is contained in:
2026-07-04 19:35:42 +08:00
parent b7553418fa
commit bf6051c8c6
3 changed files with 611 additions and 279 deletions

View File

@@ -393,12 +393,15 @@ wire dma_s_wlast ;
wire dma_s_wvalid ;
wire dma_s_wready ;
wire [4 :0] dma_s_bid ;
wire [1 :0] dma_s_bresp ;
wire dma_s_bvalid ;
wire dma_s_bready ;
wire dma_finish ;
// reserved
wire [1 :0] dma_s_bresp ;
wire dma_s_bvalid ;
wire dma_s_bready ;
wire dma_finish ;
wire cdma_dma_finish;
wire cdma_matmul_seq_irq;
assign dma_finish = cdma_dma_finish | cdma_matmul_seq_irq;
// reserved
wire [4 :0] axiOut_1_arid ;
wire [31:0] axiOut_1_araddr ;
wire [7 :0] axiOut_1_arlen ;
@@ -1576,11 +1579,115 @@ wire [2:0] cdma_s_arprot;
wire cdma_s_arvalid;
wire cdma_s_arready;
wire [31:0] cdma_s_rdata;
wire [1:0] cdma_s_rresp;
wire cdma_s_rvalid;
wire cdma_s_rready;
axi_axil_adapter #(
wire [1:0] cdma_s_rresp;
wire cdma_s_rvalid;
wire cdma_s_rready;
wire [31:0] cdma_mux_awaddr;
wire cdma_mux_awvalid;
wire cdma_mux_awready;
wire [31:0] cdma_mux_wdata;
wire [3:0] cdma_mux_wstrb;
wire cdma_mux_wvalid;
wire cdma_mux_wready;
wire [1:0] cdma_mux_bresp;
wire cdma_mux_bvalid;
wire cdma_mux_bready;
wire [31:0] cdma_mux_araddr;
wire cdma_mux_arvalid;
wire cdma_mux_arready;
wire [31:0] cdma_mux_rdata;
wire [1:0] cdma_mux_rresp;
wire cdma_mux_rvalid;
wire cdma_mux_rready;
wire [31:0] cdma_bridge_awaddr;
wire cdma_bridge_awvalid;
wire cdma_bridge_awready;
wire [31:0] cdma_bridge_wdata;
wire [3:0] cdma_bridge_wstrb;
wire cdma_bridge_wvalid;
wire cdma_bridge_wready;
wire [1:0] cdma_bridge_bresp;
wire cdma_bridge_bvalid;
wire cdma_bridge_bready;
wire [31:0] cdma_bridge_araddr;
wire cdma_bridge_arvalid;
wire cdma_bridge_arready;
wire [31:0] cdma_bridge_rdata;
wire [1:0] cdma_bridge_rresp;
wire cdma_bridge_rvalid;
wire cdma_bridge_rready;
wire bridge_cdma_req_valid;
wire bridge_cdma_req_ready;
wire [1:0] bridge_cdma_req_mode;
wire [31:0] bridge_cdma_req_src;
wire [31:0] bridge_cdma_req_dst;
wire [31:0] bridge_cdma_req_bytes;
wire [3:0] bridge_cdma_req_ep_id;
wire [3:0] bridge_cdma_req_ep_bank;
wire [7:0] bridge_cdma_req_ep_word_off;
wire bridge_cdma_req_done;
wire cdma_axil_wr_bridge = (cdma_s_awaddr[11:8] == 4'h2);
wire cdma_axil_rd_bridge = (cdma_s_araddr[11:8] == 4'h2);
reg cdma_axil_wr_active;
reg cdma_axil_wr_bridge_hold;
reg cdma_axil_b_bridge;
reg cdma_axil_r_bridge;
wire cdma_axil_wr_sel = cdma_axil_wr_active ? cdma_axil_wr_bridge_hold : cdma_axil_wr_bridge;
assign cdma_mux_awaddr = cdma_s_awaddr;
assign cdma_mux_awvalid = cdma_s_awvalid && !cdma_axil_wr_sel;
assign cdma_mux_wdata = cdma_s_wdata;
assign cdma_mux_wstrb = cdma_s_wstrb;
assign cdma_mux_wvalid = cdma_s_wvalid && !cdma_axil_wr_sel;
assign cdma_mux_bready = cdma_s_bready && !cdma_axil_b_bridge;
assign cdma_mux_araddr = cdma_s_araddr;
assign cdma_mux_arvalid = cdma_s_arvalid && !cdma_axil_rd_bridge;
assign cdma_mux_rready = cdma_s_rready && !cdma_axil_r_bridge;
assign cdma_bridge_awaddr = cdma_s_awaddr;
assign cdma_bridge_awvalid = cdma_s_awvalid && cdma_axil_wr_sel;
assign cdma_bridge_wdata = cdma_s_wdata;
assign cdma_bridge_wstrb = cdma_s_wstrb;
assign cdma_bridge_wvalid = cdma_s_wvalid && cdma_axil_wr_sel;
assign cdma_bridge_bready = cdma_s_bready && cdma_axil_b_bridge;
assign cdma_bridge_araddr = cdma_s_araddr;
assign cdma_bridge_arvalid = cdma_s_arvalid && cdma_axil_rd_bridge;
assign cdma_bridge_rready = cdma_s_rready && cdma_axil_r_bridge;
assign cdma_s_awready = cdma_axil_wr_sel ? cdma_bridge_awready : cdma_mux_awready;
assign cdma_s_wready = cdma_axil_wr_sel ? cdma_bridge_wready : cdma_mux_wready;
assign cdma_s_bresp = cdma_axil_b_bridge ? cdma_bridge_bresp : cdma_mux_bresp;
assign cdma_s_bvalid = cdma_axil_b_bridge ? cdma_bridge_bvalid : cdma_mux_bvalid;
assign cdma_s_arready = cdma_axil_rd_bridge ? cdma_bridge_arready : cdma_mux_arready;
assign cdma_s_rdata = cdma_axil_r_bridge ? cdma_bridge_rdata : cdma_mux_rdata;
assign cdma_s_rresp = cdma_axil_r_bridge ? cdma_bridge_rresp : cdma_mux_rresp;
assign cdma_s_rvalid = cdma_axil_r_bridge ? cdma_bridge_rvalid : cdma_mux_rvalid;
always @(posedge sys_clk) begin
if (!sys_resetn) begin
cdma_axil_wr_active <= 1'b0;
cdma_axil_wr_bridge_hold <= 1'b0;
cdma_axil_b_bridge <= 1'b0;
cdma_axil_r_bridge <= 1'b0;
end else begin
if (cdma_s_awvalid && !cdma_axil_wr_active) begin
cdma_axil_wr_active <= 1'b1;
cdma_axil_wr_bridge_hold <= cdma_axil_wr_bridge;
end
if (cdma_s_awvalid && cdma_s_awready && cdma_s_wvalid && cdma_s_wready) begin
cdma_axil_b_bridge <= cdma_axil_wr_sel;
cdma_axil_wr_active <= 1'b0;
end
if (cdma_s_arvalid && cdma_s_arready)
cdma_axil_r_bridge <= cdma_axil_rd_bridge;
end
end
axi_axil_adapter #(
.ADDR_WIDTH(32),
.AXI_DATA_WIDTH(32),
.AXI_ID_WIDTH(5),
@@ -1645,11 +1752,56 @@ u_axi_axil_adapter(
.m_axil_rdata(cdma_s_rdata),
.m_axil_rresp(cdma_s_rresp),
.m_axil_rvalid(cdma_s_rvalid),
.m_axil_rready(cdma_s_rready)
);
// 8 通道 DMA
snix_axil_cdma_mux #(
.m_axil_rready(cdma_s_rready)
);
cdma_matmul_bridge #(
.ADDR_WIDTH (32),
.AXIL_ADDR_WIDTH (32),
.AXIL_DATA_WIDTH (32)
) u_cdma_matmul_bridge (
.clk (sys_clk),
.rst_n (sys_resetn),
.s_axil_awaddr (cdma_bridge_awaddr),
.s_axil_awvalid (cdma_bridge_awvalid),
.s_axil_awready (cdma_bridge_awready),
.s_axil_wdata (cdma_bridge_wdata),
.s_axil_wstrb (cdma_bridge_wstrb),
.s_axil_wvalid (cdma_bridge_wvalid),
.s_axil_wready (cdma_bridge_wready),
.s_axil_bresp (cdma_bridge_bresp),
.s_axil_bvalid (cdma_bridge_bvalid),
.s_axil_bready (cdma_bridge_bready),
.s_axil_araddr (cdma_bridge_araddr),
.s_axil_arvalid (cdma_bridge_arvalid),
.s_axil_arready (cdma_bridge_arready),
.s_axil_rdata (cdma_bridge_rdata),
.s_axil_rresp (cdma_bridge_rresp),
.s_axil_rvalid (cdma_bridge_rvalid),
.s_axil_rready (cdma_bridge_rready),
.cdma_req_valid (bridge_cdma_req_valid),
.cdma_req_ready (bridge_cdma_req_ready),
.cdma_req_mode (bridge_cdma_req_mode),
.cdma_req_src (bridge_cdma_req_src),
.cdma_req_dst (bridge_cdma_req_dst),
.cdma_req_bytes (bridge_cdma_req_bytes),
.cdma_req_ep_id (bridge_cdma_req_ep_id),
.cdma_req_ep_bank (bridge_cdma_req_ep_bank),
.cdma_req_ep_word_off(bridge_cdma_req_ep_word_off),
.cdma_req_done (bridge_cdma_req_done),
.mat_start_valid (matmul_direct_start_valid),
.mat_start_bank (matmul_direct_start_bank),
.mat_done_clear (matmul_direct_done_clear),
.mat_crc_clear (matmul_direct_crc_clear),
.mat_done (matmul_direct_done),
.seq_done_irq (cdma_matmul_seq_irq)
);
// 8 通道 DMA
snix_axil_cdma_mux #(
.ADDR_WIDTH (32),
.DATA_WIDTH (32), // 适配你的 32-bit 总线
.AXIL_ADDR_WIDTH (32),
@@ -1663,23 +1815,23 @@ snix_axil_cdma_mux #(
.rst_n (sys_resetn), // 低电平复位
// AXI-Lite 从机接口 (接 CPU 发来的配置请求)
.s_axil_awaddr (cdma_s_awaddr),
.s_axil_awvalid (cdma_s_awvalid),
.s_axil_awready (cdma_s_awready),
.s_axil_wdata (cdma_s_wdata),
.s_axil_wstrb (cdma_s_wstrb),
.s_axil_wvalid (cdma_s_wvalid),
.s_axil_wready (cdma_s_wready),
.s_axil_bresp (cdma_s_bresp),
.s_axil_bvalid (cdma_s_bvalid),
.s_axil_bready (cdma_s_bready),
.s_axil_araddr (cdma_s_araddr),
.s_axil_arvalid (cdma_s_arvalid),
.s_axil_arready (cdma_s_arready),
.s_axil_rdata (cdma_s_rdata),
.s_axil_rresp (cdma_s_rresp),
.s_axil_rvalid (cdma_s_rvalid),
.s_axil_rready (cdma_s_rready),
.s_axil_awaddr (cdma_mux_awaddr),
.s_axil_awvalid (cdma_mux_awvalid),
.s_axil_awready (cdma_mux_awready),
.s_axil_wdata (cdma_mux_wdata),
.s_axil_wstrb (cdma_mux_wstrb),
.s_axil_wvalid (cdma_mux_wvalid),
.s_axil_wready (cdma_mux_wready),
.s_axil_bresp (cdma_mux_bresp),
.s_axil_bvalid (cdma_mux_bvalid),
.s_axil_bready (cdma_mux_bready),
.s_axil_araddr (cdma_mux_araddr),
.s_axil_arvalid (cdma_mux_arvalid),
.s_axil_arready (cdma_mux_arready),
.s_axil_rdata (cdma_mux_rdata),
.s_axil_rresp (cdma_mux_rresp),
.s_axil_rvalid (cdma_mux_rvalid),
.s_axil_rready (cdma_mux_rready),
// AXI4 主机接口 (接 Crossbar 去搬运数据)
.mm2mm_awid (dma_m_awid),
@@ -1739,14 +1891,19 @@ snix_axil_cdma_mux #(
.ep_rd_data (matmul_ep_rd_data),
.ep_rd_ready (matmul_ep_rd_ready),
.mat_start_valid (matmul_direct_start_valid),
.mat_start_bank (matmul_direct_start_bank),
.mat_done_clear (matmul_direct_done_clear),
.mat_crc_clear (matmul_direct_crc_clear),
.mat_done (matmul_direct_done),
.ext_req_valid (bridge_cdma_req_valid),
.ext_req_ready (bridge_cdma_req_ready),
.ext_req_mode (bridge_cdma_req_mode),
.ext_req_src (bridge_cdma_req_src),
.ext_req_dst (bridge_cdma_req_dst),
.ext_req_bytes (bridge_cdma_req_bytes),
.ext_req_ep_id (bridge_cdma_req_ep_id),
.ext_req_ep_bank (bridge_cdma_req_ep_bank),
.ext_req_ep_word_off(bridge_cdma_req_ep_word_off),
.ext_req_done (bridge_cdma_req_done),
// 全局中断输出
.dma_finish (dma_finish)
.dma_finish (cdma_dma_finish)
);
endmodule