diff --git a/rtl/ip/matmul/matmul_axi_slave.v b/rtl/ip/matmul/matmul_axi_slave.v
index 5d8de43..b2444b0 100644
--- a/rtl/ip/matmul/matmul_axi_slave.v
+++ b/rtl/ip/matmul/matmul_axi_slave.v
@@ -65,6 +65,9 @@ module matmul_axi_slave (
     input      [7:0]  s_axi_awlen,
     input      [2:0]  s_axi_awsize,
     input      [1:0]  s_axi_awburst,
+    input             s_axi_awlock,
+    input      [3:0]  s_axi_awcache,
+    input      [2:0]  s_axi_awprot,
     input             s_axi_awvalid,
     output reg        s_axi_awready,
 
@@ -88,6 +91,9 @@ module matmul_axi_slave (
     input      [7:0]  s_axi_arlen,
     input      [2:0]  s_axi_arsize,
     input      [1:0]  s_axi_arburst,
+    input             s_axi_arlock,
+    input      [3:0]  s_axi_arcache,
+    input      [2:0]  s_axi_arprot,
     input             s_axi_arvalid,
     output reg        s_axi_arready,
 
diff --git a/rtl/soc_top.v b/rtl/soc_top.v
index 66f1fb6..cefec8d 100644
--- a/rtl/soc_top.v
+++ b/rtl/soc_top.v
@@ -602,53 +602,6 @@ wire [1 :0] axiOut_7_bresp  ;
 wire        axiOut_7_bvalid ;
 wire        axiOut_7_bready ;
 
-//slave 7 - matmul accelerator
-matmul_axi_slave u_matmul_axi_slave (
-    .clk            (sys_clk),
-    .resetn         (sys_resetn),
-
-    .s_axi_awid     (axiOut_7_awid   ),
-    .s_axi_awaddr   (axiOut_7_awaddr ),
-    .s_axi_awlen    (axiOut_7_awlen  ),
-    .s_axi_awsize   (axiOut_7_awsize ),
-    .s_axi_awburst  (axiOut_7_awburst),
-    .s_axi_awlock   (axiOut_7_awlock ),
-    .s_axi_awcache  (axiOut_7_awcache),
-    .s_axi_awprot   (axiOut_7_awprot ),
-    .s_axi_awvalid  (axiOut_7_awvalid),
-    .s_axi_awready  (axiOut_7_awready),
-
-    .s_axi_wid      (axiOut_7_wid   ),
-    .s_axi_wdata    (axiOut_7_wdata ),
-    .s_axi_wstrb    (axiOut_7_wstrb ),
-    .s_axi_wlast    (axiOut_7_wlast ),
-    .s_axi_wvalid   (axiOut_7_wvalid),
-    .s_axi_wready   (axiOut_7_wready),
-
-    .s_axi_bid      (axiOut_7_bid   ),
-    .s_axi_bresp    (axiOut_7_bresp ),
-    .s_axi_bvalid   (axiOut_7_bvalid),
-    .s_axi_bready   (axiOut_7_bready),
-
-    .s_axi_arid     (axiOut_7_arid   ),
-    .s_axi_araddr   (axiOut_7_araddr ),
-    .s_axi_arlen    (axiOut_7_arlen  ),
-    .s_axi_arsize   (axiOut_7_arsize ),
-    .s_axi_arburst  (axiOut_7_arburst),
-    .s_axi_arlock   (axiOut_7_arlock ),
-    .s_axi_arcache  (axiOut_7_arcache),
-    .s_axi_arprot   (axiOut_7_arprot ),
-    .s_axi_arvalid  (axiOut_7_arvalid),
-    .s_axi_arready  (axiOut_7_arready),
-
-    .s_axi_rid      (axiOut_7_rid   ),
-    .s_axi_rdata    (axiOut_7_rdata ),
-    .s_axi_rresp    (axiOut_7_rresp ),
-    .s_axi_rlast    (axiOut_7_rlast ),
-    .s_axi_rvalid   (axiOut_7_rvalid),
-    .s_axi_rready   (axiOut_7_rready)
-);
-
 wire confreg_int;
 
 AxiCrossbar_2x8  u_AxiCrossbar_2x8 (
@@ -1078,7 +1031,7 @@ AxiCrossbar_2x8  u_AxiCrossbar_2x8 (
 
 );
 
-// add your code
+
 
 core_top u_cpu(
     .intrpt          ({7'b0, confreg_int}), //high active
@@ -1512,6 +1465,54 @@ fft_controller u_fft_controller(
     .fft_finish 	(fft_finish  )
 );
 
+
+//slave 7 - matmul accelerator
+matmul_axi_slave u_matmul_axi_slave (
+    .clk            (sys_clk),
+    .resetn         (sys_resetn),
+
+    .s_axi_awid     (axiOut_7_awid   ),
+    .s_axi_awaddr   (axiOut_7_awaddr ),
+    .s_axi_awlen    (axiOut_7_awlen  ),
+    .s_axi_awsize   (axiOut_7_awsize ),
+    .s_axi_awburst  (axiOut_7_awburst),
+    .s_axi_awlock   (axiOut_7_awlock ),
+    .s_axi_awcache  (axiOut_7_awcache),
+    .s_axi_awprot   (axiOut_7_awprot ),
+    .s_axi_awvalid  (axiOut_7_awvalid),
+    .s_axi_awready  (axiOut_7_awready),
+
+    .s_axi_wid      (axiOut_7_wid   ),
+    .s_axi_wdata    (axiOut_7_wdata ),
+    .s_axi_wstrb    (axiOut_7_wstrb ),
+    .s_axi_wlast    (axiOut_7_wlast ),
+    .s_axi_wvalid   (axiOut_7_wvalid),
+    .s_axi_wready   (axiOut_7_wready),
+
+    .s_axi_bid      (axiOut_7_bid   ),
+    .s_axi_bresp    (axiOut_7_bresp ),
+    .s_axi_bvalid   (axiOut_7_bvalid),
+    .s_axi_bready   (axiOut_7_bready),
+
+    .s_axi_arid     (axiOut_7_arid   ),
+    .s_axi_araddr   (axiOut_7_araddr ),
+    .s_axi_arlen    (axiOut_7_arlen  ),
+    .s_axi_arsize   (axiOut_7_arsize ),
+    .s_axi_arburst  (axiOut_7_arburst),
+    .s_axi_arlock   (axiOut_7_arlock ),
+    .s_axi_arcache  (axiOut_7_arcache),
+    .s_axi_arprot   (axiOut_7_arprot ),
+    .s_axi_arvalid  (axiOut_7_arvalid),
+    .s_axi_arready  (axiOut_7_arready),
+
+    .s_axi_rid      (axiOut_7_rid   ),
+    .s_axi_rdata    (axiOut_7_rdata ),
+    .s_axi_rresp    (axiOut_7_rresp ),
+    .s_axi_rlast    (axiOut_7_rlast ),
+    .s_axi_rvalid   (axiOut_7_rvalid),
+    .s_axi_rready   (axiOut_7_rready)
+);
+
 wire [31:0] cdma_s_awaddr;
 wire [2:0]  cdma_s_awprot; 
 wire        cdma_s_awvalid;