Optimize asm matmul dma software path

This commit is contained in:
2026-07-06 00:13:01 +08:00
parent 094157ff05
commit 93d2fbd935
7 changed files with 422 additions and 714 deletions

View File

@@ -1,7 +1,8 @@
TARGET = user-sample
MATMUL_GROUP_NUM ?= 5000
CFLAGS += -O3 -g -DMATMUL_GROUP_NUM=$(MATMUL_GROUP_NUM)
MATMUL_FAST_START ?= 1
CFLAGS += -O3 -g -DMATMUL_GROUP_NUM=$(MATMUL_GROUP_NUM) -DMATMUL_FAST_START=$(MATMUL_FAST_START)
C_SRCS := $(wildcard ./*.c )
@@ -9,6 +10,14 @@ OBJDIR = obj
COMMON_DIR = ../../bsp
GCC_DIR=../../../toolchains/loongson-gnu-toolchain-8.3-x86_64-loongarch32r-linux-gnusf-v2.0
PICOLIBC_DIR=../../../toolchains/picolibc
ifeq ($(MATMUL_FAST_START),1)
LINKER_SCRIPT := script_matmul_fast.lds
BSP_STARTUP := start_matmul_fast.S
BSP_USE_TRAP := 0
BSP_USE_DRIVERS := 0
endif
include ../../bsp/common.mk
# Strip picolibc: no -lc -lm -lg -lsemihost, keep -lgcc only

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@@ -0,0 +1,89 @@
OUTPUT_ARCH(loongarch)
ENTRY(_start)
MEMORY
{
isram (rwxai) : ORIGIN = 0x1c000000, LENGTH = 512K
dsram (rwxai) : ORIGIN = 0x1c080000, LENGTH = 512K
}
SECTIONS
{
__stack_size = DEFINED(__stack_size) ? __stack_size : 4K;
.init :
{
KEEP(*(SORT_NONE(.init)))
} >isram AT>isram
. = ALIGN(16);
.text :
{
_ftext = .;
*(.text.unlikely .text.unlikely.*)
*(.text.startup .text.startup.*)
*(.text .text.*)
*(.gnu.linkonce.t.*)
} >isram AT>isram
. = ALIGN(16);
.rodata :
{
*(.rdata)
*(.rodata .rodata.*)
*(.gnu.linkonce.r.*)
*(.srodata.cst16)
*(.srodata.cst8)
*(.srodata.cst4)
*(.srodata.cst2)
*(.srodata .srodata.*)
} >isram AT>isram
. = ALIGN(16);
PROVIDE(__etext = .);
PROVIDE(_etext = .);
PROVIDE(etext = .);
PROVIDE(_data_lma = .);
.data ORIGIN(dsram) :
{
PROVIDE(_data = .);
*(.data .data.*)
*(.gnu.linkonce.d.*)
. = ALIGN(16);
PROVIDE(__global_pointer$ = . + 0x800);
*(.sdata .sdata.*)
*(.gnu.linkonce.s.*)
. = ALIGN(16);
PROVIDE(_edata = .);
PROVIDE(edata = .);
} >dsram AT>isram
.bss :
{
PROVIDE(__bss_start = .);
*(.sbss*)
*(.sbss.*)
*(.dynsbss)
*(.scommon)
*(.bss)
*(.bss.*)
*(.dynbss)
*(.gnu.linkonce.sb.*)
*(COMMON)
. = ALIGN(16);
PROVIDE(_end = .);
PROVIDE(end = .);
} >dsram AT>dsram
PROVIDE(__heap_start = _end);
.stack ORIGIN(dsram) + LENGTH(dsram) - __stack_size :
{
PROVIDE(_heap_end = .);
PROVIDE(__heap_end = _heap_end);
PROVIDE(__heap_size = __heap_end - __heap_start);
. = __stack_size;
PROVIDE(_stack = .);
} >dsram AT>dsram
}

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@@ -0,0 +1,54 @@
#include "regdef.h"
.section .init
.globl _start
.type _start, @function
_start:
/* Enable direct mapped windows used by SRAM and uncached peripherals. */
li.w t0, 0x8
li.w t1, 0x18
csrxchg t0, t1, csr_crmd
csrwr zero, csr_dmw0
csrwr zero, csr_dmw1
li.w t0, 0x19
csrwr t0, csr_dmw0
li.w t0, 0xa0000009
csrwr t0, csr_dmw1
li.w t0, 0x10
li.w t1, 0x18
csrxchg t0, t1, csr_crmd
/* Polling-only benchmark: keep interrupts disabled. */
li.w t0, 0x4
csrxchg zero, t0, csr_crmd
csrwr zero, csr_prmd
csrwr zero, csr_ecfg
/* UART0 init, 115200 baud with the same divisor selection as BSP start.S. */
li.w t0, 0xbf000000
li.w t1, 0x07
st.b t1, t0, 2
li.w t1, 0x80
st.b t1, t0, 3
st.b zero, t0, 1
li.w t2, 0xbf20f500
ld.w t2, t2, 0
li.w t1, 0x1b
beq zero, t2, 1f
li.w t1, 0x1
1:
st.b t1, t0, 0
li.w t1, 0x03
st.b t1, t0, 3
st.b zero, t0, 4
la.local sp, _stack
li.w a0, 0
li.w a1, 0
bl main
1:
b 1b

View File

@@ -1,42 +1,98 @@
/**
* user-sample - CIC-IEC 2026 Stage 3 Evaluation Program
*
* Matmul AXI-master path.
* Matmul AXI-master path with fast startup and low-overhead UART output.
*/
#include <dma.h>
/* ─── UART 16550 direct access (bypasses slow printf/picolibc) ──────── */
#define UART_THR (*(volatile unsigned char *)0xbf000000)
#define UART_LSR (*(volatile unsigned char *)0xbf000005)
#define LSR_THRE 0x20
static inline void uart_tx(unsigned char c) {
while (!(UART_LSR & LSR_THRE)) {}
static inline void uart_tx(unsigned char c)
{
while ((UART_LSR & LSR_THRE) == 0) {
}
UART_THR = c;
}
static void uart_puts(const char *s) {
while (*s) uart_tx(*s++);
static void uart_put_matmul_start_fifo(void)
{
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'S';
UART_THR = 'T';
UART_THR = 'A';
UART_THR = 'R';
UART_THR = 'T';
}
static void uart_puthex(unsigned int val) {
int i;
for (i = 28; i >= 0; i -= 4) {
unsigned char nibble = (val >> i) & 0xF;
uart_tx(nibble < 10 ? '0' + nibble : 'a' + nibble - 10);
static inline void uart_wait_tx_empty(void)
{
while ((UART_LSR & LSR_THRE) == 0) {
}
}
/* ─── Configurable group count (default 5000) ──────────────────────── */
static inline unsigned char hex_digit(unsigned int val, int shift)
{
unsigned char nibble = (unsigned char)((val >> shift) & 0xf);
return (unsigned char)(nibble < 10 ? ('0' + nibble) : ('a' + nibble - 10));
}
static void uart_put_result_fifo(unsigned int crc)
{
uart_wait_tx_empty();
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'C';
UART_THR = 'R';
UART_THR = 'C';
UART_THR = '3';
UART_THR = '2';
UART_THR = '=';
UART_THR = hex_digit(crc, 28);
UART_THR = hex_digit(crc, 24);
UART_THR = hex_digit(crc, 20);
uart_wait_tx_empty();
UART_THR = hex_digit(crc, 16);
UART_THR = hex_digit(crc, 12);
UART_THR = hex_digit(crc, 8);
UART_THR = hex_digit(crc, 4);
UART_THR = hex_digit(crc, 0);
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'D';
UART_THR = 'O';
UART_THR = 'N';
UART_THR = 'E';
}
#ifndef MATMUL_GROUP_NUM
#define MATMUL_GROUP_NUM 5000
#endif
/* ─── BSP globals ─────────────────────────────────────────────────── */
#if MATMUL_FAST_START == 0
unsigned long UART_BASE = 0xbf000000;
#endif
/* ─── Memory layout ────────────────────────────────────────────────── */
#define EXTRAM_BASE_PHYS 0x1c400000
#define EXTRAM_BASE_UNCACHED (0xA0000000 | (EXTRAM_BASE_PHYS & 0x1FFFFFFF))
@@ -44,11 +100,9 @@ unsigned long UART_BASE = 0xbf000000;
#define DST_BASE_WORDS (SRC_BASE_WORDS + MATMUL_GROUP_NUM * 32)
#define RESULT_WORDS (MATMUL_GROUP_NUM * 48)
/* ExtRAM Physical Addresses for DMA */
#define EXTRAM_PHYS_AB(g) (EXTRAM_BASE_PHYS + (SRC_BASE_WORDS * 4) + (g) * 128)
#define EXTRAM_PHYS_C(g) (EXTRAM_BASE_PHYS + (DST_BASE_WORDS * 4) + (g) * 192)
/* ─── MATMUL IP registers (Ping-Pong Memory Map) ──────────────────── */
#define MATMUL_BASE_PHYS 0x1f500000
#define MATMUL_BASE_UNCACHED 0xbf500000
@@ -70,24 +124,22 @@ unsigned long UART_BASE = 0xbf000000;
#define MATMUL_CRC (MATMUL_BASE_UNCACHED + 0x010)
/* ─── Pre-computed DMA burst control word ──────────────────────────── */
#define DMA_CTRL_VAL (CTRL_BURST_SIZE(2) | CTRL_BURST_LEN(63) | CTRL_START_BIT)
#define MATMUL_EP_ID 0
/* ═══════════════════════════════════════════════════════════════════ */
int main(void)
{
if (MATMUL_GROUP_NUM <= 0) return 0;
if (MATMUL_GROUP_NUM <= 0) {
return 0;
}
/* ── Hot-path local volatile pointers (one-time addr calc) ──────── */
volatile unsigned int *mat_ctrl = (volatile unsigned int *)MATMUL_CTRL;
volatile unsigned int *mat_status = (volatile unsigned int *)MATMUL_STATUS;
volatile unsigned int *mat_crc = (volatile unsigned int *)MATMUL_CRC;
unsigned int crc;
/* ── Start marker (must be first output) ──────────────────── */
uart_puts("MATMUL_START\n");
uart_put_matmul_start_fifo();
*(volatile unsigned int *)MATMUL_CRC = 0;
*mat_status = STATUS_DMA_DONE | STATUS_DONE | STATUS_ERROR;
@@ -100,12 +152,9 @@ int main(void)
while (!(*mat_status & STATUS_DMA_DONE)) {}
*mat_status = STATUS_DMA_DONE;
/* ── Read hardware CRC32 ──────────────────────────────────── */
crc = *mat_crc;
uart_puts("MATMUL_CRC32=");
uart_puthex(crc);
uart_puts("\nMATMUL_DONE\n");
uart_put_result_fifo(crc);
return 0;
}