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Use parenthesized pairwise addition to prevent synthesis truncation

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FallenSigh
2026-06-25 03:41:58 +08:00
parent fba86b01a8
commit 86eab428a7
1 changed files with 8 additions and 8 deletions
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16
rtl/ip/matmul/matmul_axi_slave.v
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@@ -439,16 +439,16 @@ module matmul_axi_slave (
end
C_ACCUM: begin
if (cur_bank == 1'b0) begin
b0_c[calc_idx] <= {2'b0, mult_p_r[0]} + {2'b0, mult_p_r[1]} +
{2'b0, mult_p_r[2]} + {2'b0, mult_p_r[3]};
end else begin
b1_c[calc_idx] <= {2'b0, mult_p_r[0]} + {2'b0, mult_p_r[1]} +
{2'b0, mult_p_r[2]} + {2'b0, mult_p_r[3]};
end
if (cur_bank == 1'b0)
b0_c[calc_idx] <= ({2'b0, mult_p_r[0]} + {2'b0, mult_p_r[1]}) +
({2'b0, mult_p_r[2]} + {2'b0, mult_p_r[3]});
else
b1_c[calc_idx] <= ({2'b0, mult_p_r[0]} + {2'b0, mult_p_r[1]}) +
({2'b0, mult_p_r[2]} + {2'b0, mult_p_r[3]});
$display("ACCUM calc_idx=%d sum=%h p0=%h p1=%h p2=%h p3=%h",
calc_idx,
{2'b0, mult_p_r[0]} + {2'b0, mult_p_r[1]} + {2'b0, mult_p_r[2]} + {2'b0, mult_p_r[3]},
({2'b0, mult_p_r[0]} + {2'b0, mult_p_r[1]}) +
({2'b0, mult_p_r[2]} + {2'b0, mult_p_r[3]}),
mult_p_r[0], mult_p_r[1], mult_p_r[2], mult_p_r[3]);
if (calc_idx == 4'd15) begin