perf(matmul): pre-fire DMA Ch0 load + inline wait/DMA start + XOR bank toggle
user-sample.c v2 optimizations: - Pre-fire DMA Ch0 load at loop tail to overlap fully with IP compute - Inline wait_matmul_done/wait_dma_done to eliminate function call overhead - Inline DMA register writes, skip redundant STATUS_BUSY_BIT check - Replace g%2 with XOR bank toggle (bank ^= 1) - Cache volatile pointers in locals (ch0, ch1, mat_status, mat_ctrl) Makefile: bump -O2 to -O3
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sdk/axi_ram.mif
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