fallensigh/ciciec2026
Archived
0
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

feat: optimize startup and linking

Browse Source
This commit is contained in:
FallenSigh
2026-07-05 17:27:26 +08:00
parent 423ff32b49
commit 7281df356f
11 changed files with 292 additions and 97 deletions
Download Patch File Download Diff File Expand all files Collapse all files

23
sdk/software/examples/asm/user-sample.c
View File

@@ -26,6 +26,23 @@ static void uart_puts(const char *s)
}
}
static void uart_put_matmul_start_fifo(void)
{
UART_THR = 'M';
UART_THR = 'A';
UART_THR = 'T';
UART_THR = 'M';
UART_THR = 'U';
UART_THR = 'L';
UART_THR = '_';
UART_THR = 'S';
UART_THR = 'T';
UART_THR = 'A';
UART_THR = 'R';
UART_THR = 'T';
UART_THR = '\n';
}
static void uart_puthex(unsigned int val)
{
int i;
@@ -44,7 +61,9 @@ static void uart_puthex(unsigned int val)
#define MATMUL_WRITEBACK_RESULTS 1
#endif
#if MATMUL_FAST_START == 0
unsigned long UART_BASE = 0xbf000000;
#endif
#define EXTRAM_BASE_PHYS 0x1c400000u
#define SRC_BASE_WORDS 0u
@@ -65,8 +84,6 @@ int main(void)
return 0;
}
uart_puts("MATMUL_START\n");
DMA_SEQ->STATUS = SEQ_DONE_BIT;
DMA_SEQ->SRC_BASE = EXTRAM_PHYS_AB(0);
DMA_SEQ->DST_BASE = EXTRAM_PHYS_C(0);
@@ -78,6 +95,8 @@ int main(void)
#if MATMUL_WRITEBACK_RESULTS == 0
seq_ctrl |= SEQ_SKIP_STORE_BIT;
#endif
uart_put_matmul_start_fifo();
DMA_SEQ->CTRL = seq_ctrl;
while ((DMA_SEQ->STATUS & SEQ_DONE_BIT) == 0u) {