diff --git a/doc/reports/logo_cicc.png b/doc/reports/logo_cicc.png new file mode 100644 index 0000000..1d079c3 Binary files /dev/null and b/doc/reports/logo_cicc.png differ diff --git a/doc/reports/mlkem_ip_design_report.pdf b/doc/reports/mlkem_ip_design_report.pdf index 884384b..d431ae4 100644 Binary files a/doc/reports/mlkem_ip_design_report.pdf and b/doc/reports/mlkem_ip_design_report.pdf differ diff --git a/doc/reports/mlkem_ip_design_report.tex b/doc/reports/mlkem_ip_design_report.tex index 4aec977..343ddd5 100644 --- a/doc/reports/mlkem_ip_design_report.tex +++ b/doc/reports/mlkem_ip_design_report.tex @@ -16,20 +16,25 @@ \usepackage{fancyhdr} \usepackage{tikz} \usepackage{enumitem} +\usepackage[normalem]{ulem} \usepackage{listings} \usepackage{xcolor} \usepackage{algorithm} \usepackage{algpseudocode} % ─── Styling ───────────────────────────────────────────────── +\raggedbottom \hypersetup{colorlinks=true,linkcolor=black,citecolor=black,urlcolor=blue} \pagestyle{fancy} \fancyhead[LO,RE]{ML-KEM硬件IP设计报告} \fancyhead[RO,LE]{\thepage} \fancyfoot[C]{} -\setlength{\parskip}{6pt plus 2pt minus 1pt} +\setlength{\parskip}{4pt plus 2pt minus 1pt} \setlength{\parindent}{2em} \setlength{\headheight}{14pt} +\setlength{\intextsep}{6pt plus 2pt} +\setlength{\textfloatsep}{8pt plus 2pt} +\captionsetup{skip=4pt} \lstset{basicstyle=\ttfamily\small,breaklines=true,frame=single,numbers=left,numberstyle=\tiny,xleftmargin=2em,language=Verilog} @@ -38,10 +43,44 @@ \title{\textbf{ML-KEM后量子密钥封装硬件IP核\\设计与验证}} \author{碳基生物\\[4pt] \small 团队编号：CICC1008439\\[8pt] \normalsize 龙芯中科杯·2026全国大学生集成电路创新创业大赛} -\date{\today} +\date{} \begin{document} +% ================================================================ +% 封 面 +% ================================================================ +\begin{titlepage} +\thispagestyle{empty} +\begin{center} + +\vspace*{30pt} + +\includegraphics[width=0.45\textwidth]{logo_cicc.png} + +\vspace{36pt} + +{\fontsize{22pt}{28pt}\selectfont\bfseries 第十届} + +\vspace{4pt} + +{\fontsize{22pt}{28pt}\selectfont\bfseries 全国大学生集成电路创新创业大赛} + +\end{center} + +\vspace{80pt} + +\begin{flushleft} +\fontsize{14pt}{22pt}\selectfont +报告类型：\uline{\hfill 设计报告\hfill} \\[18pt] +参赛杯赛：\uline{\hfill 龙芯中科杯\hfill} \\[18pt] +作品名称：\uline{\hfill ML-KEM后量子密钥封装硬件IP核设计与验证\hfill} \\[18pt] +队伍编号：\uline{\hfill CICC1008439\hfill} \\[18pt] +团队名称：\uline{\hfill 碳基生物\hfill} +\end{flushleft} + +\end{titlepage} + \maketitle \tableofcontents \newpage @@ -79,7 +118,7 @@ RTL代码总计约5,517行（不含测试平台），其中\texttt{mlkem\_top.v} \texttt{mlkem\_top}的运行时参数由输入端口$k\_i$和$op\_i$在\texttt{start\_i}脉冲时刻锁存至内部寄存器$k\_r$和$op\_r$，后续所有数据通路宽度、存储子区间基地址和循环次数均由$k\_r$推导。表\ref{tab:params}列出三种安全等级的密钥和密文尺寸。 -\begin{table}[H] +\begin{table}[htbp] \centering \caption{运行时安全等级参数} \label{tab:params} @@ -100,7 +139,7 @@ $k\_i$ & 方案 & $K$ & $\eta_1$ & $(d_u,d_v)$ & ek(B) & dk(B) & ct(B) \\ \texttt{mlkem\_top}的端口按功能分为四组。表\ref{tab:ports}列出主要信号。 -\begin{table}[H] +\begin{table}[htbp] \centering \caption{mlkem\_top主要端口} \label{tab:ports} @@ -109,7 +148,7 @@ $k\_i$ & 方案 & $K$ & $\eta_1$ & $(d_u,d_v)$ & ek(B) & dk(B) & ct(B) \\ \toprule \textbf{信号} & \textbf{位宽} & \textbf{功能} \\ \midrule -clk, rst\_n & 1, 1 & 时钟（25 MHz）与低电平异步复位 \\ +clk, rst\_n & 1, 1 & 时钟（50 MHz）与低电平异步复位 \\ k\_i, op\_i & 3, 2 & 安全等级（2/3/4）与操作码（0=KG, 1=Enc, 2=Dec） \\ d\_i, z\_i, msg\_i & 256×3 & KeyGen种子$d$、隐式拒绝种子$z$、Encaps消息$m$ \\ start\_i & 1 & 启动脉冲，锁存$k\_i$和$op\_i$ \\ @@ -144,9 +183,9 @@ Decaps私钥预装载路径中，\texttt{dk\_in\_*}端口根据写入地址自 图\ref{fig:mlkem_modules}给出\texttt{mlkem\_top}的内部层次结构。设计分为三个逻辑层：控制调度层（FSM + 地址生成 + 数据通路复用）、算子计算层（7个已验证的叶子模块）和存储层（7个BRAM实例）。 -\begin{figure}[H] +\begin{figure}[htbp] \centering -\includegraphics[width=\textwidth]{mlkem_modules.png} +\includegraphics[width=0.92\textwidth]{mlkem_modules.png} \caption{mlkem\_top内部三层模块结构} \label{fig:mlkem_modules} \end{figure} @@ -155,9 +194,9 @@ Decaps私钥预装载路径中，\texttt{dk\_in\_*}端口根据写入地址自 全部运算由5-bit状态机集中调度，从\texttt{ST\_IDLE}出发按$op\_r$分支为三条数据通路。图\ref{fig:fsm}给出状态转移图。 -\begin{figure}[H] +\begin{figure}[htbp] \centering -\includegraphics[width=\textwidth]{fsm.png} +\includegraphics[width=0.92\textwidth]{fsm.png} \caption{mlkem\_top顶层FSM状态转移图} \label{fig:fsm} \end{figure} @@ -222,9 +261,9 @@ Decaps路径对应FIPS 203算法18，前5个主状态完成D1--D5步解密恢复 \texttt{keccak\_core}模块实现24轮连续Keccak-f[1600]置换，内部结构为简单的迭代流水线：1600-bit状态寄存器$\rightarrow$组合\texttt{keccak\_round}$\rightarrow$写回状态寄存器。\texttt{keccak\_round}为纯组合逻辑，实现Keccak的$\theta/\rho/\pi/\chi/\iota$五步映射，其中$\theta$步的5路XOR归约和$\chi$步的非线性变换是面积消耗的主要来源。 -\begin{figure}[H] +\begin{figure}[htbp] \centering -\includegraphics[width=\textwidth]{keccak_core.png} +\includegraphics[width=0.92\textwidth]{keccak_core.png} \caption{Keccak-f[1600]核数据通路与共享机制} \label{fig:keccak_core} \end{figure} @@ -237,7 +276,7 @@ Decaps路径对应FIPS 203算法18，前5个主状态完成D1--D5步解密恢复 \texttt{ntt\_core}模块实现256点前向/逆向数论变换，采用单蝶形流水线加256$\times$12-bit寄存器阵列的架构。图\ref{fig:ntt_core}给出数据通路与控制状态机。 -\begin{figure}[H] +\begin{figure}[htbp] \centering % [IMAGE_PROMPT: Data path diagram for ntt_core. Left side: 256-entry × 12-bit coefficient register file (cr[0..255]). A read mux selects cr[j] and cr[j+layer_len] based on the current butterfly pair address. These feed a pipelined butterfly unit (butterfly_unit_pipe, 7-stage pipeline) which computes a_out = a + zeta*b mod Q, b_out = a - zeta*b mod Q using a pipelined Barrett multiplier inside. Zeta comes from zeta_rom (128 entries × 12-bit). The butterfly output a_out/b_out go through an 8-stage writeback delay line (wa_d0..wa_d7, wb_d0..wb_d7) that matches pipeline depth, then write back to cr[wa] and cr[wb]. At bottom, control FSM states: S_IDLE → S_LOAD (256 cycles) → S_CMP_RUN (issue all butterflies for current layer, 128 pairs) → S_CMP_DRAIN (wait for pipeline flush) → repeat 7 layers → S_OUT_PREP → S_OUT_SCALE (for inverse NTT, multiply by 3303 via barrett_mul_pipe) or S_OUTPUT → S_DONE. Annotate total cycles: ~2260 for full forward NTT. Clean academic style.] \caption{NTT核数据通路与控制状态机} @@ -258,7 +297,7 @@ NTT的7层蝶形网络按Cooley-Tukey位反转置换顺序执行。每层内128 \texttt{basecase\_mul}为纯组合逻辑，数据通路包含5个\texttt{barrett\_mul}实例。$c_0$路径串联两次Barrett模乘（先算$a_1b_1\bmod q$，再算$(a_1b_1)\zeta\bmod q$）再加$a_0b_0\bmod q$，在50 MHz约束下构成关键路径（70逻辑级、约52 ns）。 -\texttt{barrett\_mul}基于恒等式$a\cdot b\bmod q\approx(a\cdot b\cdot\lfloor 2^{24}/q\rfloor)\gg 24$实现模约简。对于$q=3329$，$\lfloor 2^{24}/3329\rfloor=5039$。实现流程为：计算$p=a\cdot b$（24-bit乘积）$\rightarrow$计算$qe=(p\cdot 5039)\gg 24$（商估计）$\rightarrow$计算$r=p-qe\cdot 3329$（余数估计）$\rightarrow$两次条件减$q$修正（保证$r