User mods: matmul RTL + shift_add_mult + C program

rtl/ip/matmul/shift_add_mult.v

@@ -0,0 +1,49 @@
+module shift_add_mult (
+    input             clk,
+    input             rstn,
+    input             start,
+    input      [31:0] a,
+    input      [31:0] b,
+    output reg [63:0] p,
+    output reg        done
+);
+    reg [5:0]  cnt;
+    reg [63:0] a_reg;
+    reg [31:0] b_reg;
+    reg        busy;
+
+    always @(posedge clk) begin
+        if (!rstn) begin
+            busy <= 1'b0;
+            done <= 1'b0;
+            p    <= 64'b0;
+            cnt  <= 6'd0;
+            a_reg<= 64'b0;
+            b_reg<= 32'b0;
+        end else begin
+            if (start && !busy) begin
+                a_reg <= {32'b0, a};
+                b_reg <= b;
+                p     <= 64'b0;
+                cnt   <= 6'd0;
+                busy  <= 1'b1;
+                done  <= 1'b0;
+            end else if (busy) begin
+                if (cnt == 6'd32) begin
+                    busy <= 1'b0;
+                    done <= 1'b1;
+                end else begin
+                    // 如果 b 的当前最低位为 1，则累加 a
+                    if (b_reg[0]) begin
+                        p <= p + a_reg;
+                    end
+                    a_reg <= a_reg << 1;
+                    b_reg <= b_reg >> 1;
+                    cnt   <= cnt + 6'd1;
+                end
+            end else begin
+                done <= 1'b0;
+            end
+        end
+    end
+endmodule