From 5dcee80b954ea2c8a0a9f702f79d22e8ec67c7ab Mon Sep 17 00:00:00 2001 From: FallenSigh Date: Wed, 24 Jun 2026 23:46:58 +0800 Subject: [PATCH] DMA-driven: A+B+C per group via DMA ch0/ch1, -O2 CRC32 from ExtRAM --- sdk/software/examples/asm/user-sample.c | 45 ++++++++++++------------- 1 file changed, 22 insertions(+), 23 deletions(-) diff --git a/sdk/software/examples/asm/user-sample.c b/sdk/software/examples/asm/user-sample.c index 0d514f7..e2b88da 100644 --- a/sdk/software/examples/asm/user-sample.c +++ b/sdk/software/examples/asm/user-sample.c @@ -1,9 +1,10 @@ /** - * user-sample — CIC-IEC 2026 Stage 3 + * user-sample — CIC-IEC 2026 Stage 3 (DMA-driven) */ #include #include +#include "dma.h" #ifndef MATMUL_GROUP_NUM #define MATMUL_GROUP_NUM 5000 @@ -31,6 +32,13 @@ unsigned long CORE_CLOCKS_PER_SEC = 33000000L; #define MATMUL_B_BASE (MATMUL_BASE + 0x060) #define MATMUL_C_BASE (MATMUL_BASE + 0x0a0) +/* DMA needs physical addresses (mask high bits) */ +#define MATMUL_A_BASE_PHYS ((MATMUL_A_BASE) & 0x1FFFFFFF) +#define MATMUL_C_BASE_PHYS ((MATMUL_C_BASE) & 0x1FFFFFFF) + +#define INPUT_BYTES_PER_GROUP 128 /* 32 words of A+B */ +#define OUTPUT_BYTES_PER_GROUP 192 /* 48 words of C */ + #define CTRL_START 0x1 #define STATUS_BUSY 0x1 #define STATUS_DONE 0x2 @@ -108,18 +116,6 @@ static const uint32_t crc32_table[256] = { 0xB40BBE37, 0xC30C8EA1, 0x5A05DF1B, 0x2D02EF8D }; -static void read_ip(uint32_t base, volatile uint32_t *dst, int n) -{ - for (int i = 0; i < n; i++) - dst[i] = REG_RD(base + i * 4); -} - -static void write_ip(uint32_t base, const volatile uint32_t *src, int n) -{ - for (int i = 0; i < n; i++) - REG_WR(base + i * 4, src[i]); -} - static void wait_done(void) { uint32_t status; @@ -130,27 +126,30 @@ static void wait_done(void) int main(void) { volatile uint32_t *extram = (volatile uint32_t *)EXTRAM_BASE; - uint32_t a_buf[16], b_buf[16], c_buf[48]; uint32_t crc; int g, i; printf("MATMUL_START\n"); for (g = 0; g < MATMUL_GROUP_NUM; g++) { - for (i = 0; i < 16; i++) { - a_buf[i] = extram[SRC_BASE + g * 32 + i]; - b_buf[i] = extram[SRC_BASE + g * 32 + 16 + i]; - } - write_ip(MATMUL_A_BASE, a_buf, 16); - write_ip(MATMUL_B_BASE, b_buf, 16); + uint32_t src_phys = EXTRAM_BASE_PHYS + g * INPUT_BYTES_PER_GROUP; + uint32_t dst_phys = EXTRAM_BASE_PHYS + DST_BASE * 4 + g * OUTPUT_BYTES_PER_GROUP; + + /* DMA ch0: ExtRAM → IP (A[16]+B[16] in one burst) */ + dma_start_transfer(0, src_phys, MATMUL_A_BASE_PHYS, INPUT_BYTES_PER_GROUP, 0); + dma_wait_polling(0); + + /* Start IP */ REG_WR(MATMUL_STATUS, STATUS_DONE | STATUS_ERROR); REG_WR(MATMUL_CTRL, CTRL_START); wait_done(); - read_ip(MATMUL_C_BASE, c_buf, 48); - for (i = 0; i < 48; i++) - extram[DST_BASE + g * 48 + i] = c_buf[i]; + + /* DMA ch1: IP → ExtRAM (C[48]) */ + dma_start_transfer(1, MATMUL_C_BASE_PHYS, dst_phys, OUTPUT_BYTES_PER_GROUP, 0); + dma_wait_polling(1); } + /* ── CRC32 from ExtRAM result region ────────────────────────── */ crc = 0xFFFFFFFF; for (i = 0; i < RESULT_WORDS; i++) { uint32_t w = extram[DST_BASE + i];