Fix: s_axi_rlast must be output reg (assigned in always block)

rtl/ip/matmul/matmul_axi_slave.v

@@ -39,7 +39,7 @@ module matmul_axi_slave (
     output reg [4:0]  s_axi_rid,
     output reg [31:0] s_axi_rdata,
     output     [1:0]  s_axi_rresp,
-    output            s_axi_rlast,
+    output reg        s_axi_rlast,
     output reg        s_axi_rvalid,
     input             s_axi_rready
 );