Reduce CDMA matmul bridge request latency

This commit is contained in:
2026-07-04 20:12:45 +08:00
parent 27cdfb713a
commit 2725f6eb57
2 changed files with 54 additions and 41 deletions

View File

@@ -400,6 +400,12 @@ module snix_axil_cdma_mux #(
logic ep_arready;
logic ep_rready;
typedef enum logic [2:0] {EP_IDLE, EP_AR, EP_READ, EP_AW, EP_WRITE, EP_BRESP, EP_DONE} ep_state_t;
ep_state_t ep_state;
logic [31:0] ep_axi_addr;
logic [31:0] ep_bytes_left;
logic [7:0] ep_word_addr_r;
logic ext_active;
logic [1:0] ext_mode_r;
logic [ADDR_WIDTH-1:0] ext_src_r;
@@ -559,15 +565,23 @@ module snix_axil_cdma_mux #(
.mm2mm_rready (core_rready)
);
wire [7:0] ep_beats_total = (engine_bytes[31:2] == 30'd0) ? 8'd1 : engine_bytes[9:2];
wire [7:0] ep_axi_len = ep_beats_total - 8'd1;
wire ep_mode_mem2ep = (engine_mode == MODE_MEM2EP);
wire ep_mode_ep2mem = (engine_mode == MODE_EP2MEM);
wire ep_rd_done_fire = (ep_state == EP_READ) && mm2mm_rvalid && ep_rready && mm2mm_rlast;
wire ep_wr_done_fire = (ep_state == EP_BRESP) && mm2mm_bvalid && ep_bready;
wire ep_done_fast = ep_rd_done_fire || ep_wr_done_fire;
// ==========================================
// Generic external endpoint requester
// ==========================================
assign ext_req_ready = !ext_active && (state == IDLE) && (ep_state == EP_IDLE);
assign ext_req_done = ext_active && ep_done_fast;
always_ff @(posedge clk) begin
if (!rst_n) begin
ext_active <= 1'b0;
ext_req_done <= 1'b0;
ext_mode_r <= MODE_MEM2EP;
ext_src_r <= '0;
ext_dst_r <= '0;
@@ -576,8 +590,6 @@ module snix_axil_cdma_mux #(
ext_ep_bank_r <= '0;
ext_ep_word_off_r <= '0;
end else begin
ext_req_done <= 1'b0;
if (ext_accept) begin
ext_active <= 1'b1;
ext_mode_r <= ext_req_mode;
@@ -587,9 +599,8 @@ module snix_axil_cdma_mux #(
ext_ep_id_r <= ext_req_ep_id;
ext_ep_bank_r <= ext_req_ep_bank;
ext_ep_word_off_r <= ext_req_ep_word_off;
end else if (ext_active && ep_done) begin
ext_active <= 1'b0;
ext_req_done <= 1'b1;
end else if (ext_active && ep_done_fast) begin
ext_active <= 1'b0;
end
end
end
@@ -597,17 +608,6 @@ module snix_axil_cdma_mux #(
// ==========================================
// Endpoint transfer engine (32-bit only in this SoC integration)
// ==========================================
typedef enum logic [2:0] {EP_IDLE, EP_AR, EP_READ, EP_AW, EP_WRITE, EP_BRESP, EP_DONE} ep_state_t;
ep_state_t ep_state;
logic [31:0] ep_axi_addr;
logic [31:0] ep_bytes_left;
logic [7:0] ep_word_addr_r;
wire [7:0] ep_beats_total = (engine_bytes[31:2] == 30'd0) ? 8'd1 : engine_bytes[9:2];
wire [7:0] ep_axi_len = ep_beats_total - 8'd1;
wire ep_mode_mem2ep = (engine_mode == MODE_MEM2EP);
wire ep_mode_ep2mem = (engine_mode == MODE_EP2MEM);
always_ff @(posedge clk) begin
if (!rst_n) begin
ep_state <= EP_IDLE;