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Reduce CDMA matmul bridge request latency

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FallenSigh
2026-07-04 20:12:45 +08:00
parent 27cdfb713a
commit 2725f6eb57
2 changed files with 54 additions and 41 deletions
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61
rtl/ip/cdma/cdma_matmul_bridge.sv
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@@ -128,6 +128,35 @@ module cdma_matmul_bridge #(
end
endfunction
task issue_load_req;
input [31:0] load_idx;
begin
cdma_req_mode <= MODE_MEM2EP;
cdma_req_src <= seq_src_base + (load_idx * seq_src_stride);
cdma_req_dst <= '0;
cdma_req_bytes <= MAT_AB_BYTES;
cdma_req_ep_id <= 4'd0;
cdma_req_ep_bank <= {3'b000, load_idx[0]};
cdma_req_ep_word_off <= 8'd0;
cdma_req_valid <= 1'b1;
seq_state <= SQ_LOAD_REQ;
end
endtask
task issue_store_req;
begin
cdma_req_mode <= MODE_EP2MEM;
cdma_req_src <= '0;
cdma_req_dst <= dst_addr_for_store;
cdma_req_bytes <= MAT_C_BYTES;
cdma_req_ep_id <= 4'd0;
cdma_req_ep_bank <= {3'b000, seq_compute_bank};
cdma_req_ep_word_off <= 8'd0;
cdma_req_valid <= 1'b1;
seq_state <= SQ_STORE_REQ;
end
endtask
assign s_axil_bresp = 2'b00;
assign s_axil_rresp = 2'b00;
assign seq_done_irq = seq_done_flag;
@@ -270,19 +299,11 @@ module cdma_matmul_bridge #(
end
SQ_CLEAR: begin
seq_state <= SQ_LOAD_START;
issue_load_req(32'd0);
end
SQ_LOAD_START: begin
cdma_req_mode <= MODE_MEM2EP;
cdma_req_src <= src_addr_for_load;
cdma_req_dst <= '0;
cdma_req_bytes <= MAT_AB_BYTES;
cdma_req_ep_id <= 4'd0;
cdma_req_ep_bank <= {3'b000, loaded_bank};
cdma_req_ep_word_off <= 8'd0;
cdma_req_valid <= 1'b1;
seq_state <= SQ_LOAD_REQ;
issue_load_req(seq_load_idx);
end
SQ_LOAD_REQ: begin
@@ -299,12 +320,12 @@ module cdma_matmul_bridge #(
seq_defer_load_start <= 1'b0;
seq_deferred_start_valid <= 1'b1;
seq_deferred_start_bank <= cdma_req_ep_bank[0];
seq_state <= SQ_STORE_START;
issue_store_req();
end else begin
mat_start_valid <= 1'b1;
mat_start_bank <= cdma_req_ep_bank[0];
if ((seq_load_idx + 32'd1) < seq_groups && (seq_load_idx == 32'd0)) begin
seq_state <= SQ_LOAD_START;
issue_load_req(seq_load_idx + 32'd1);
end else begin
seq_state <= SQ_WAIT_DONE;
end
@@ -321,29 +342,21 @@ module cdma_matmul_bridge #(
if ((seq_store_idx + 32'd1) >= seq_groups) begin
seq_state <= SQ_DONE;
end else if (seq_load_idx < seq_groups) begin
seq_state <= SQ_LOAD_START;
issue_load_req(seq_load_idx);
end else begin
seq_state <= SQ_WAIT_DONE;
end
end else if (seq_load_idx < seq_groups) begin
seq_defer_load_start <= 1'b1;
seq_state <= SQ_LOAD_START;
issue_load_req(seq_load_idx);
end else begin
seq_state <= SQ_STORE_START;
issue_store_req();
end
end
end
SQ_STORE_START: begin
cdma_req_mode <= MODE_EP2MEM;
cdma_req_src <= '0;
cdma_req_dst <= dst_addr_for_store;
cdma_req_bytes <= MAT_C_BYTES;
cdma_req_ep_id <= 4'd0;
cdma_req_ep_bank <= {3'b000, seq_compute_bank};
cdma_req_ep_word_off <= 8'd0;
cdma_req_valid <= 1'b1;
seq_state <= SQ_STORE_REQ;
issue_store_req();
end
SQ_STORE_REQ: begin