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Add CDMA endpoint path for matmul transfers

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FallenSigh
2026-07-01 20:15:55 +08:00
parent 3d39fc2f5e
commit 09fc1aeb44
5 changed files with 439 additions and 56 deletions
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28
sdk/software/examples/asm/user-sample.c
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@@ -63,10 +63,6 @@ unsigned long CORE_CLOCKS_PER_SEC = 33000000L;
#define MATMUL_CTRL (MATMUL_BASE_UNCACHED + 0x000)
#define MATMUL_STATUS (MATMUL_BASE_UNCACHED + 0x004)
#define MATMUL_PHYS_B0_AB (MATMUL_BASE_PHYS + 0x100)
#define MATMUL_PHYS_B0_C (MATMUL_BASE_PHYS + 0x180)
#define MATMUL_PHYS_B1_AB (MATMUL_BASE_PHYS + 0x300)
#define MATMUL_PHYS_B1_C (MATMUL_BASE_PHYS + 0x380)
#define CTRL_START_B0 0x1
#define CTRL_START_B1 0x2
@@ -77,6 +73,7 @@ unsigned long CORE_CLOCKS_PER_SEC = 33000000L;
/* ─── Pre-computed DMA burst control word ──────────────────────────── */
#define DMA_CTRL_VAL (CTRL_BURST_SIZE(2) | CTRL_BURST_LEN(63) | CTRL_START_BIT)
#define MATMUL_EP_ID 0
/* ═══════════════════════════════════════════════════════════════════ */
int main(void)
@@ -93,9 +90,6 @@ int main(void)
unsigned int crc;
int g, bank;
// Ping-Pong Register Address Arrays (Physical for DMA)
unsigned int phys_bank_AB[2] = {MATMUL_PHYS_B0_AB, MATMUL_PHYS_B1_AB};
unsigned int phys_bank_C[2] = {MATMUL_PHYS_B0_C, MATMUL_PHYS_B1_C};
unsigned int ctrl_start[2] = {CTRL_START_B0, CTRL_START_B1};
/* ── Start marker (must be first output) ──────────────────── */
@@ -111,8 +105,10 @@ int main(void)
// DMA Ch0: Load group 0 A+B (128 bytes) → IP Bank 0
ch0->SRC_ADDR = EXTRAM_PHYS_AB(0);
ch0->DST_ADDR = phys_bank_AB[0];
ch0->DST_ADDR = 0;
ch0->LENGTH = 128;
ch0->MODE = DMA_MODE_MEM2EP;
ch0->EP_CFG = DMA_EP_CFG(MATMUL_EP_ID, 0, 0);
ch0->CTRL = DMA_CTRL_VAL;
while (!(ch0->STATUS & STATUS_DONE_BIT)) {}
ch0->STATUS = STATUS_DONE_BIT;
@@ -123,8 +119,10 @@ int main(void)
// Pre-fire: DMA Ch0 load group 1 → Bank 1 (overlaps with IP compute)
if (MATMUL_GROUP_NUM > 1) {
ch0->SRC_ADDR = EXTRAM_PHYS_AB(1);
ch0->DST_ADDR = phys_bank_AB[1];
ch0->DST_ADDR = 0;
ch0->LENGTH = 128;
ch0->MODE = DMA_MODE_MEM2EP;
ch0->EP_CFG = DMA_EP_CFG(MATMUL_EP_ID, 1, 0);
ch0->CTRL = DMA_CTRL_VAL;
}
@@ -157,9 +155,11 @@ int main(void)
}
// 3. Start DMA Ch1 store: group (g-1) result → ExtRAM
ch1->SRC_ADDR = phys_bank_C[prev_bank];
ch1->SRC_ADDR = 0;
ch1->DST_ADDR = EXTRAM_PHYS_C(g - 1);
ch1->LENGTH = 192;
ch1->MODE = DMA_MODE_EP2MEM;
ch1->EP_CFG = DMA_EP_CFG(MATMUL_EP_ID, prev_bank, 0);
ch1->CTRL = DMA_CTRL_VAL;
// 4. Wait for current DMA Ch0 load (group g → cur_bank, pre-fired in iteration g-1)
@@ -174,8 +174,10 @@ int main(void)
if (g < MATMUL_GROUP_NUM - 1) {
int next_bank = bank ^ 1;
ch0->SRC_ADDR = EXTRAM_PHYS_AB(g + 1);
ch0->DST_ADDR = phys_bank_AB[next_bank];
ch0->DST_ADDR = 0;
ch0->LENGTH = 128;
ch0->MODE = DMA_MODE_MEM2EP;
ch0->EP_CFG = DMA_EP_CFG(MATMUL_EP_ID, next_bank, 0);
ch0->CTRL = DMA_CTRL_VAL;
}
@@ -195,9 +197,11 @@ int main(void)
while (!(ch1->STATUS & STATUS_DONE_BIT)) {}
ch1->STATUS = STATUS_DONE_BIT;
ch1->SRC_ADDR = phys_bank_C[(MATMUL_GROUP_NUM - 1) % 2];
ch1->SRC_ADDR = 0;
ch1->DST_ADDR = EXTRAM_PHYS_C(MATMUL_GROUP_NUM - 1);
ch1->LENGTH = 192;
ch1->MODE = DMA_MODE_EP2MEM;
ch1->EP_CFG = DMA_EP_CFG(MATMUL_EP_ID, (MATMUL_GROUP_NUM - 1) % 2, 0);
ch1->CTRL = DMA_CTRL_VAL;
while (!(ch1->STATUS & STATUS_DONE_BIT)) {}
ch1->STATUS = STATUS_DONE_BIT;